The Development And Research On Register Allocation And Gode Generation Of Compilers For Media Processor

Compiler is an important part of computer system. By translating programs from high-level languages to assemblies of target machines, it can help the development of application programs. DSPs and media-processors have been widely used in areas like digital signal processing, media processing and embedded system. Comparing with general purpose processors, they have complex and specialized instructions to make the applications of these peculiar areas getting higher performance. But there are some difficulties occur when designing compilers for these processors, such like instructions being difficult to be generated from high level languages and the heterogeneous of register file and instruction set.Register allocation and code generation are key parts of generating high performance assembly code. For the gap of target machines, register allocation and code generation of compilers for media processors can't directly adopt the corresponding mes of general processor's compilers. Designs and modifies by demands are needed.Mainly facing digital signal processing and media processing, MD160x and MD320x are two series of processors designed by Information and Communication Institute Zhejiang University. Targeting them, two compilers named MD16CC and MD32CC are implemented, which have their special features in register allocation and code generation.MD160x is a type of 16-bit DSP with pipeline. The instruction set and register file are heterogeneous, so that the general approaches like register allocation via graph coloring and code generation via pattern matching would lead bad performance of target code. So, an improved direct code generator called IDCG is designed and implemented in MD16CC.MD320x is a type of 32-bit media processor by combining RISC and DSP structures. It provides general purpose registers (GPR), and multiple addressing modes by using some GPRs as index registers and auxiliary registers. Further more, parallel instructions and SIMD instructions are provided to give the processor strong capability of media processing. But at the same time, these features decrease the amount of registers that can be used in register allocation, and so challenge the register allocation algorithm in MD32CC. The author designed and implemented an improved approach of register allocation via graph coloring, improved the performance of register allocation effectively.