Research And Implementation Of 155M POS Interface For Dual-stack Router

To satisfy the trend that IPv4 network evolving to IPv6 network, dual-stack router is developed. And 155M POS interface, which will be abbreviated as LP, is one of its interface types. Based on the design and implementation of LP, we have had a thorough reach about the key technology on the high-density POS interface design. This article describes the design scheme of the LP and gives a detailed analysis of the implementation technology for the hardware & software sub-system.The main contribution of this article is as following:Firstly, this article has researched the origin of POS and analyzed its features. Currently, there are two kinds of protocol stack for POS, IP/PPP/HDLC/SDH and IP/PPP/HDLC/SDH. We chose the former for it is the most commonly used.Then, it researches the key technology for high density POS interface of routers. It analyzes the problem brought by the conversion from bytes to packets in POS mode and tells the right converting point. Also it provides the formula to calculate the depth of the packet buffer. It puts forward an algorithm named MDRR to be used for the multiplexing of the packets. Analysis indicates that MDRR is fair for all the queues.An all-round analysis of the output packet queuing mode has been made in this paper. It puts forward an algorithm named TPPQ for the mode based on priority, and analysis indicates that TPPQ can avoid the waste of bandwidth thus the output bandwidth can be fully used.Based on the feature of POS, the need of dual-stack and the feature of high-density line-card, this article gives a detailed analysis of the function and performance requirement of LP and divides it into some modules.It provides the design scheme for the hardware subsystem whose center is a monolithic SDH processing chip and FPGA. Describe the modules design of hardware subsystem that is decomposed from the view of point of data flow. Analyze the software that is based on VxWorks (a kind of RTOS), and divides it into some modules.Also, it provides the implementation scheme of the hardware subsystem, and some new technologies are used in it. And also the implementation scheme for the software subsystem is put forward. It is worthy of addressing that this article use task management strategy task buffer management strategy to make the softwaremore reliable.