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Study On HVMOS Device Technology Compatible With Conventional CMOS Process

Posted on:2004-05-18Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y OuFull Text:PDF
GTID:2168360122467283Subject:Microelectronics and solid
Abstract/Summary:PDF Full Text Request
The increasing integration density of VLSI (Very-Large-Scale-Integrated) circuits and the low-power requirements of complex signal processing applications, force the continuous reduction of the power supply voltages in modern ICs (Integrated Circuits). While the low-voltage CMOS (Complementary Metal Oxide Semiconductor) technologies implementing these ICs are optimized for speed, minimum power consumption and maximum integration density, they cannot meet the requirements of system applications where high-voltage capabilities are needed. When electronic signal processing involves high-voltage and/or high-current, different solutions are presented according to the power level of the application.With the development of computer science, TCAD (Technology Computer Aided Design) become a more and more indispensable tool in modern IC manufacturing and device investigation. It has many advantages compared with real wafer experiments: 1. Shorter Circle Time: In a real Fab, it will take weeks to give out a IC from an initial wafer; but we can get simulated results in hours by using TCAD tools. 2. Less Equipment Cost: It will cost a huge amount of money to build a Fab, while it cost a little money to setup the hardware and software of a computer. Though it is not so precise for the simulated resultscompared with real measured data. The results can be improved by correction and optimization to the software. The most important thing is that it can give a guideline of research by giving right predictions.In present dissertation, an introduction of several normal HVIC structure, also analysis and research of structures which is compatible with conventional CMOS technology were carried out. The compatibility between HV technology and conventional LV technology and the modification to LV technology was discussed. Based on a 0.5 5V Single Poly Double Metal CMOS technology,HV processes were integrated into it as new technology modules. Technology parameter was decided by simulation experiments. Spice model parameter of LV device was kept unchanged as much as possible. SVX (Smart Voltage eXtension) structure was taped out and had a wafer-test. At last, solutions suitable for different voltage range were given out.
Keywords/Search Tags:HVIC technology, Double diffused MOSFET, Breakdown Voltage, Technology CAD, SVX
PDF Full Text Request
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