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The Research And Realization On Parallel Distributed VHDL Simulation With PVM

Posted on:2004-04-29Degree:MasterType:Thesis
Country:ChinaCandidate:J M LiFull Text:PDF
GTID:2168360092997051Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Ever since the dawn of 21st century the integrated circuit design industry has been more and more challenged by the requirements of manufacturing technologies and production designs. They all have constantly been requiring the integrated circuit design industry to provide better and more complicated ASIC(Application Specific Integrated Circuit) products in shorter time. All of this can only be achieved by automatic design. A veryimportant step of automatic design is the logical simulation of digital system. It seems to be very important to have a fast and efficient logical simulation system to design and manufacturecircuits which are in the form of patent.Firstly this article introduces the features, structure and development of VHDL language and parallel technology as well. It also points out the advantage of clustering PCs running in PVM parallel environment. Secondly it discusses in detail the purpose, process and module of VHDL logical simulation. It makes comparison of several simulation algorithms which are in common use, pointing out the advantage of parallel simulation. Thirdly it discusses PVM(Parallel Virtual Machine). It analyzes the features of VHDL language and the basic theory of parallel simulation. Based on the analysis and the fact that digital system can be consisted of a few subsystems and their logical functions are independent from each other it discusses the object oriented analysis and design method. Through multi-layer, multi-area andstandard hardware description language VHDL it discusses digital system. It illustrates how independent modules are divided during compiling and sorting phase. It takes a module as an example to do logical simulation in Cluster based on PVM(Parallel Virtual Machine). It discusses how synchronization is achieved Via message sending and receiving.. In the following this article describes a Cluster environment which is based on PVM and which contains 8 notes. It illustrates the simulation based on SPMD algorithm of PVM. Simulation is done after compiling and dividing. All the information required by simulation is provided during compiling anddividing. The main control machine starts an application, which is in charge of creating task group, initializing and sending messages to sub-notes to start parallel tasks, receiving returnmessages, processing data and displaying data. A sub-note machine receives message(data), analyzes data, starts corresponding component simulation sub-application, processes data, sends message and waits for next message.In the last part the article introduces the experiment of the study stated above. It effectively solves parallel problems. Based on the analysis under certain conditions the method can achieve ideal performance, but it does contains issues. For example, there is disadvantage of parallel computing. If the number of parallel tasks is not proper message sending and receiving can cause waste of processors. This can effect the time and performance of simulation. Parallel algorithms can be optimized by using some methods. These issues will be solved in future experiments and the algorithm will be optimized.VI...
Keywords/Search Tags:VHDL, PVM, Distributed, Simulation
PDF Full Text Request
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