Research Of Hardware Logical Connection Between TMS320C6202 And VMEbus

The task of the design is to connect TMS320C6202 chip to VMEbus with VIC068A/VAC068A interface chip and transmit data by MASTER/SLAVE single circle or block. I design the whole configuration block diagram and then I develop the partial module.There are two interfaces in the design: SLAVE interface is connecting VIC068A/VAC068A to VMEbus with other peripheral equipments, MASTER interface is connecting VIC068A/VAC068A to CPU with FPGA. There are some other problems in the design, for- example, how to produce and arbitrate reset signals, how to actualize address map decode in master/slave transmission, how to change the voltage, how to produce interrupt, etc.After one year, I have accomplished the design of SLAVE interface, single circle transmission, block transmission and address map decode and completed the sofeware compilation and emulation of the FPGA module about the reset module signals and MASTER interface control signals.