Representation Method And Simulation Of Boolean Process-based Waveform By HDL

With the fast deve1opment and wide appl ication of VLS1 techno1ogy,the higher demands for some aspects inc1uding comp1exity,dependabi1ity and exp1oitive cyc1e of VLSI system are advanced. HDLis good forma1 ization' hierarchy and standardization descr ipt ionmeasure of designing and keeping in the archives in digital system.A new ana1ytica1 approach to representation is introduced inBoo1ean process recent1y. Logic functlon and de1ay properties ofdigita1 integrated circuits are fa11en together to express circuitstates in continuous t ime nodes by waveform for the he1p of exact timinganal yt i cs.Thi s dissertation first describes syntax, semanteme and methodof modeling hardware of Veri1og HDL and VHDL in detai1 so that strongabi1 ity of designing and simu1ating waveform is represented inhardware circuits. The method of connecting timing into 1ogic i sexplained in waveform po1ynomia1 on the basis of waveform concept inBoo1ean Process theory. And an ana1ytica1 de1ay mode1 that is closeto practice circuits is found. Second1y, the method of waveformrepresentation inc1uding delay and hazards by HDL is ana1yzed andexpounded. Waveform simu1ation is done in combinat ion circuit andsequence circuit for val idat ing if the method of expressing waveformby HDL is practicabi1ity. At the same time, for improving the speedof waveform s imu1at ion, some key problems and used ari thmet ic appearedin waveform simulation are exp1ained in detai 1. For examp1e, the sortarithmetic so1ves 1eve1 partition of combination 1ogic; the computinginput waveform of sensitized path makes the possib1e of conf1rm theminimum c1ock circ1e; the cyc1e--based method for synchronousop tajg1fYjct7:@+${4it xsequentia1 circuits improve the speed of waveform simu1at ion.