Design Of The Safety Chip Based On RSA Encryption Arithmetic

With the development of Information Technology in the recently years,and with thinking of security of data convection through network,the manufacture that can ensure information safety has wide future in application. My thesis is on the design of security chip that using RSA arithmetic.First design of the soft core based on RSA encryption arithmetic. In this part,the function definition and structure partition are finished,then every part is depicted with Verilog HDL. By Verilog-XL tools,behavior simulation is achieved. The chip logic function that is encrypting 1024bit data is realized. The whole system can be used widely not only as an independent specific system module,but also in the embedded system with CPU control.Finally,the interface between microprocessor and RSA,or between RSA and EEPROM is implemented to realize the whole system function. The design of IIC part is depicted with Verilog HDL. By Verilog-XL tools,behavior simulation is achieved.The design work of security chip is very important in realistic application and has definitely theoretic value for the safety of our country's Information Industry.