Design Of Low Voltage And Off-Chip Capacitor-Less LDO Regulator

In recent years, with the popularity of portable electronic products, power managements are of increasing interests. Low dropout voltage linear regulator is widely used in portable applications for its simple structure, small chip areas and low output noise. Traditional LDO linear regulator uses off-chip capacitor to compensate circuits and improve the transient response performance. The off-chip capacitor is several microfarads, so it is not suitable for integrating on chip. If without any off-chip capacitors, compensating the LDO and improving transient performance is difficulties in design. With the development of SOC, without off-chip capacitor LDO will become the main research directions of LDO.First, this paper introduces topology and basic principles of the LDO, and two typical ways of compensation are discussed in detail:compensation mathod of voltage-controlled current source and compensation of zero-pole pairs. Second, a dual capicitors compensation methord to compensate LDO regulator is presented, compensation capacitors are very small, less than 1pF. And a high performance amplifier is designed to enhance loop response. In this way, transient response performance will be improved and output ripple will be reduced. Last, we design bias circuits and protection circuits, and simulate the overall performance of the LDO.Using TSMC 0.18μm MM/RF 1P6M 1.8V/3.3V process, simulation tools is Spectre of Cadence. The ranges of input voltage is between 1.4V to 4V. Output voltage and maximum current of LDO are 1.4V and 100mA.