The Design Of A High Performance Off-Chip Capacitor-Free Low Drop-Out Linear Voltage Regulator

With the rapid development of portable devices, the power management chipsface more and more intense challenges, designed with higher integrated technicalperformance power management chip has become the goal of the industry. Off-chipcapacitor-free low drop-out linear voltage regulator does not need the chip externalload capacitor and will be able to work properly. At the same time, the circuit outputvoltage ripple and output noise is very low, used for noise-sensitive circuit, and thereis no electromagnetic interference generated in the switching process. Small chip areais very suitable for applications in handheld portable devices, such as digital cameras,handheld computers and mobile phones and other devices. The price of the chip isrelatively cheap, and can greatly reduce the manufacturing costs of electronicproducts. Therefore, further study of off-chip capacitor-free low drop-out linearvoltage regulator is necessary.The principle of the conventional type of low drop-out linear voltage regulator isdescribed, and analyzed the system stability, load transient response characteristicsand power supply interference rejection ability in theory, the load capacitor of thetraditional type of the low drop-out linear voltage regulator plays a crucial role: theequivalent parasitic resistance of the load capacitor introduces of a left half plane zero,effectively improved the stability of the system; when the load current changesimmediately, electricity stored on the load capacitor can provide the current for theload; at the same time, the chip capacitor has played an effect on the power supplynoise rejection.The bandgap voltage reference provides a voltage reference that has nothing to dowith the supply voltage and ambient temperature for the low drop-out linear voltageregulator. At the same time, the startup circuit and the bias circuit of the bandgapvoltage reference are designed. The experimental results show that the performance of the bandgap voltage reference is good, and can provide the required reference voltagefor the low drop-out linear voltage regulator.A detailed analysis of the stability, the load transient response characteristics andthe power supply noise rejection capability of the off-chip capacitor-free low drop-outlinear voltage regulator is given. For the stability, the nested Miller compensation isused, and this design can work in the stability of the minimum load current at0.5mA;For the load transient response characteristics, increasing the charge current of thepower transistor is used, speed up the response time of the loop, thereby reducing theamplitude of the output voltage overshoot caused by the load transient changes; forthe circuit power supply interference rejection capability, the enhancing network ofpower supply noise rejection is designed, introduced a new zero than can compensatefor the pole affecting the ability, and effectively increased the frequency range of thepower supply noise rejection.This article designs an off-chip capacitor-free low drop-out linear voltageregulator with0.35μmCMOS process, the chip layout is drew with2P3M process, thechip area is0.1759mm2. Simulation results show that: the low frequency gain is about102dB, the phase margin is70°, the off-chip capacitor-free LDO is stable at this time;when the input voltage from2.9V~5V, the system can stabilize the output voltage at2.8V, the dropout voltage is100mV; the allowed range of load current is0.5mA~100mA; linear adjustment rate is33.7ppm/V; load current from0.5mA to100mAprocess, the load adjustment rate is17.2ppm/A; when the load current switchesbetween0.5mA and100mA within1μs, the output voltage overshoot is less than55mV, corresponding to the response time of less than1.9μs, fully meeting the chipresponse to load changes; the off-chip capacitor-free LDO power supply interferencerejection capacity can be achieved around-80dB at low frequencies and about-46dB at1MHz, with a good power supply noise rejection capability.