| Flexible DC transmission technology which is currently a pivotal technology that the country is vigorously developing has effectively improved the reliability and economy of traditional DC grids.IGBT devices,as currently popular power electronic devices,are the key components of flexible DC grid equipment at present.In order to be used in high-voltage and high-current conditions,the IGBT device is packaged in the form of multiple chips in parallel.Because of differences in device parameters,temperature,drive control,etc.,the current sharing of each chip branch is unbalanced.The unbalanced current sharing between the chips may cause damage to the IGBT chip,thereby affecting the reliable operation of the IGBT device.Therefore,it is very important to study the current sharing performance inside the IGBT device and to optimize the current sharing performance inside the device.Starting from the chip parameters of IGBT,this paper focuses on the influence of IGBT chip on transient current sharing and its mechanism,and proposes a IGBT chip screening method that considers the comprehensive influence of chip parameters.In this paper,a behavior model of IGBT chip that can accurately express the actual current stress is established,and the reliability of the model is verified by comparing simulation and experimental curves.Then a multi-chip parallel double-pulse equivalent circuit model for current sharing research is established.After that,the chip parameter dispersion index and transient current sharing evaluation index are proposed.the influence of a single chip parameter and multiple chip parameters on transient current sharing is calculated.the influence mechanism and law of the chip are analyzed.The research results show that the threshold voltage and transconductance have the most significant effects on the transient current sharing results.Finally,a screening method for IGBT chips that can achieve group optimization is proposed.The conclusion of this study is instructive for the selection of IGBT chips as well as in the transient current sharing design after paralleling. |