Research On The Spiking Neural Network Chip With Memristors

With the rapid development of Internet technology and computer technology in the early 21st century,artificial intelligence technology has entered the thrid develop-ment wave driven by data and computing power.But the development speed of AI chip is gradully limited by Von Neumann architecture,and the development of AI will face severe challenges again.Neuromorphic computing technology,which is based on biological neural computing,has become an important way to realize low-power AI due to its characteristics of spike representation,event driven and memory computing.Nowadays,the performance of neuromorphic system is close to early artificial neural network in function,or better than artificial neural network in some fields,such as spa-tiotemporal information processing,small sample data set processing and so on.As the development of semiconductor technology gradually lags behind the demand of neuro-morphic computing,the most advanced neuromorphic system is far from the humman brain.Because of its higher integration,higher energy efficiency and suitable for in memory computing technology,memristor is considered to be one of the best devices to realize neuromoprhic system.Today,the research of memristor based neuromorphic computing is still in the initial stage,and the main research is still to verify the possi-bility of neuromorphic computing by memristor in principle,or to conduct small-scale experiments by building a small-scale non reconfigurable memristor network.it is still a challenge to realize large-scale multi-core reconfigurable memristor chip.(1)The SNNs core based on memristor and analog neuron is studied and designed,and the non distortion transmission of spike is realized by using asynchronous AER circuits.Finally a 64 neurons and 4K synanpses SNNs core is realized.The preliminary verification shows that the core has neural computing capability,and the comunication system based on asynchronous AER circuits is suitable for the future implementation of multi-core architecture.(2)This paper studies the multi-core SNNs architecture based on digital communi-cation protocol,realizes the asynchronous neuron driven by events,multi-core inforam-tion interaction,phase synchronization and other functions,and finally realizes a SNNs acceleration system with 24 cores based on FPGA.(3)Combined with SNNs algorithm to design more suitable for large-scale integra-tion of analog neurons,and combined with 2T1R synapses to achieve low-power neuro-morphic computing core;combined with mesh network on chip and RISC-V processor to create large-scale reconfigurable multi-core neuromorphic computing chip based on memristor.The chip is taped out;at the same time,in order to verify the function of the chip,we designed a simulator corresponding to hardware one to one and Tools Chain for chip configuration.