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High-voltage and power semiconductor devices

Posted on:1991-12-11Degree:Ph.DType:Dissertation
University:University of California, BerkeleyCandidate:Giandomenico, DavidFull Text:PDF
GTID:1478390017452037Subject:Engineering
Abstract/Summary:
A fabrication process is developed for an entire class of merged MOS bipolar (MMB) power devices. These devices offer higher performance over MOSFETs and BJTs in terms of switching speed, current density, breakdown voltage, and ease of use. The new class of MMB devices are composed of series and darlington-like combinations of MOSFETs with BJTs and thyristors. The design of each of the devices is based on a similar cellular structure that allows the different devices to be fabricated with only minor processing variations. The design uses doped polysilicon spacers for the MOSFET's source diffusion with a self-aligned titanium silicide process to make contact to the spacers. The operation of a cascode MOS-bipolar structures is verified using 2-D device simulation.; The high voltage limitations of lateral diodes built on silicon-on-insulator (SOI) films are studied through 2-D computer simulations and analytical analysis. The breakdown voltages are found to be well below the breakdown voltage for a vertical device in bulk silicon. These results are compared to experimental devices built on zone melting recrystallized (ZMR) SOI films. It is found that a lateral linearly doped profile should improve the breakdown voltage. It is also shown that p{dollar}sp{lcub}+{rcub}{dollar}-n{dollar}sp{lcub}-{rcub}{dollar}-n{dollar}sp{lcub}+{rcub}{dollar} diodes, biased with the n{dollar}sp{lcub}+{rcub}{dollar} positive are more prone to catastrophic failure during breakdown than the same structure biased with the p region negatively biased.; The problem of oscillations in paralleled MOSFETs is analysed using a combination of techniques including a numerical analysis based on the Routh-Hurwitz criterion, circuit simulations of the loop-gain using SPICE, and an analytic analysis. From the analytic analysis, several expressions are developed that provide guidelines to ensure oscillation-free operation of paralleled MOSFETs.
Keywords/Search Tags:Devices, Voltage, Mosfets
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