Modeling geometry effects on tunneling conduction and degradation in MOS structures | | Posted on:1992-03-14 | Degree:Ph.D | Type:Dissertation | | University:University of Maryland, College Park | Candidate:Ramaswami, Ravi | Full Text:PDF | | GTID:1478390014498119 | Subject:Engineering | | Abstract/Summary: | | | With technology advances it has become possible to grow high quality semiconductor films, allowing development of heterostructure tunneling devices, for high frequency logic and memory applications. Tunneling is commonly used to transport charges through thin dielectrics in semiconductor nonvolatile memories. In this dissertation comprehensive physical models have been developed to examine the reliability problems associated with high field charge transport in MOS structures.; First, a detailed model simulating the time-dependent tunneling and degradation characteristics of MOS structures under ramped voltage stress, incorporating geometry effects, trapping at pre-stress and post-stress trap sites, and field dependent charge to breakdown is discussed. For the first time, the effect of gate edge on the time dependent tunneling characteristics has been quantitatively analyzed. It is found that gate edge region can enhance the tunneling current significantly and also accelerate oxide degradation and breakdown. Two significant applications of our model are: (1) to eliminate geometry effects in the oxide parameters extracted using ramp-stress measurements, and (2) to use the asymmetry in gate and substrate injections to electrically characterize the gate geometry and obtain an effective edge curvature.; Second, a novel technique to solve the 2-D time independent Schrodinger equation in arbitrary nonplanar regions using Schwarz-Christoffel transformation is presented. This has been incorporated in a numerical model to calculate the electron tunneling current component from gate edges of MOS structures more accurately than the above mentioned Fowler-Nordheim equation model. Tunneling probability from the gate edge is obtained by direct solution of the time-independent Schrodinger equation, using Schwarz-Christoffel transformation to map the non-planar gate edge region to a rectangular domain, and solving the transformed Schrodinger equation by finite element methods. The time invariant I-V characteristics have been simulated and compared with calculations from the Fowler-Nordheim model.; Thirdly, the effect of the stressing voltage waveshape on tunnel oxide degradation is simulated using a capacitive equivalent circuit and non-linear current sources. Oxide degradation is obtained by calculating the cell threshold voltage and the field-normalized injected charge, versus number of programming cycles, assuming trapping at uniformly distributed pre-stress and post-stress trapping centers. | | Keywords/Search Tags: | Tunneling, MOS structures, Geometry effects, Degradation, Model, Gate edge | | Related items |
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