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Single-electron devices based on nanocrystalline silicon

Posted on:1999-05-13Degree:Ph.DType:Dissertation
University:Arizona State UniversityCandidate:Lutzen, JornFull Text:PDF
GTID:1468390014970207Subject:Engineering
Abstract/Summary:
Single electron effects have been the subject of many studies in the last decade ranging from the initial observation of single-electron tunneling in granular metallic films at low temperatures to more recent silicon single electron memories operating at room temperature. Single electron storage devices could be the route to overcome the limitations of further reduction in size of standard devices promising lower power consumption and higher speed. While the basic effects have been investigated extensively, the realization of devices and fabrication technology, which are compatible with today's silicon technology, still create a challenge.; Here, the fabrication and characterization of room temperature single electron devices are reported. The devices' operation relies upon Coulomb blockade in ultrathin nanocrystalline silicon films. Amorphous silicon is deposited by low-pressure chemical vapor deposition on a conditioned silicon dioxide substrate. The dependence of the structural characteristics on deposited layer thickness and rapid thermal annealing conditions is characterized. The vertical grain size is identical with the initial amorphous film thickness, whereas the lateral grain size is controlled by the annealing conditions.; Two device types are fabricated and characterized. The first approach utilizes bare single crystalline silicon as a substrate. Room temperature single electron memory effects of a disordered double-junction array formed with ultrasmall polycrystalline silicon grains are demonstrated. The source-drain current-voltage characteristics, with the gate left floating, demonstrate periodic current steps as well as hysteresis generic for a memory device. Possible explanations for this two-terminal hysteresis effect are discussed. The second approach, which is based on silicon on insulator substrates, overcomes the problem of insufficient integrity of gate oxide formed by chemical vapor deposition. The insulating layer is grown by thermal oxidation allowing the downscaling to less than 10 nm. Coulomb-blockade in the source drain characteristic of these field effect transistor-like structures is observed at temperatures up to 40 K. The transistor characteristics show "oscillatory" features, which are reproducible and may be related to typical single electron transistor oscillation.; The technology presented should enable the fabrication of silicon single electron memory devices for room temperature operation in the same circuit with standard silicon devices.
Keywords/Search Tags:Electron, Single, Silicon, Devices, Room temperature
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