Reconfigurable architectures for multimedia and data-parallel application domains

Reconfigurable computing has opened new frontiers in the field of computer architecture and poses unique problems for the development of programming software. This work proposes MorphoSys, a new model for reconfigurable computing systems, developed to investigate the effectiveness of combining multiple reconfigurable processing elements with a general purpose processor for word-level, computation-intensive tasks such as multimedia applications. The development of a comprehensive software environment for programming and code generation for M1, the first generation implementation of MorphoSys, is presented.; M1 is a coarse-grain, integrated reconfigurable system-on-chip targeted at high-throughput and data-parallel applications such as video compression. It comprises an array of reconfigurable cells (RC Array), a modified RISC processor core (TinyRISC) and an efficient memory interface unit. We describe the MorphoSys M1 architecture, including the RC array, the TinyRISC, and data and configuration memories. The innovative features of M1 are clarified with emphasis on the SIMD nature of the RC Array. The extensive functional and interconnect reconfigurability is described along with the illustration of its utility in efficiently executing a set of target applications.; A comprehensive software environment including simulators with GUI, compiler and CAD tools, has been developed for supporting the mapping of applications to Morphosys M1. Several applications from the target application domain, such as video compression, data encryption and target recognition are mapped to the M1 architecture. Performance evaluation of these applications indicates improvements of up to an order of magnitude in comparison with other systems.; Finally, we propose several enhancements for incorporation in the second-generation MorphoSys architecture, M2. The design objective for M2 is to widen the application scope and overcome the limitations of M1. The idea of reconfigurability is extended to other system components besides the RC Array to facilitate higher system adaptability to other classes of applications.