| The realization of the GaAs-based metal-oxide-semiconductor field effect transistor (MOSFET) has been a subject of interest for many years. There remains an unfulfilled need for a good insulator to enable the GaAs-equivalent of Si complimentory metal-oxide-semiconductor (CMOS) technology. Amorphous insulator, flat insulator/semiconductor interface and low interfacial trap density are three key elements to the realization of such a metal-oxide-semiconductor (MOS) structure. This dissertation discusses the characterization and processing of GaAs-based MOS structure using native oxide (Al{dollar}sb2{dollar}O{dollar}sb3{dollar}) formed via wet oxidation or using various oxides deposited in ultra high vacuum as the gate oxide.; For the native oxide/GaAs work, a truly amorphous layer of Al{dollar}sb2{dollar}O{dollar}sb3{dollar} via wet oxidation of amorphous (Al,As) on GaAs and InP has been achieved. A physically flat interface between the oxide and semiconductor using a thin GaP interlayer as a oxidation stop layer has been reported. The roughness scale is below 15 A, which is comparable to the interface of the SiO{dollar}sb2{dollar}/Si counterpart. Three orders of magnitude of the photoluminescence intensity enhancement indicates that the electronic trap density has been reduced significantly along the interface; however, the porous structure in the amorphous oxide results in structural weakness to sustain the physical vigor in processing.; For the deposited oxide/GaAs work, only deposition of (Ga,Gd){dollar}sb2{dollar}O{dollar}sb3{dollar} oxide among others shows a low interface trap density (D{dollar}rmsb{lcub}it{rcub}){dollar} at the oxide-GaAs interface. It is low enough to warrant the demonstration of both n- and p-channel enhancement GaAs MOSFETs. High-resolution transmission electron microscopy (HRTEM) indicates that deposition of MgO, Al{dollar}sb2{dollar}O{dollar}sb3{dollar}, and Ga{dollar}sb2{dollar}O{dollar}sb3{dollar}, fail to yield a truly amorphous oxide. Although deposition of SiO{dollar}sb2{dollar} results in an amorphous oxide. There lacks a transition layer between SiO{dollar}sb2{dollar} and GaAs. A correlation between high-low frequency capacitance-voltage (C-V) phenomenon and physical interfacial structure property has been derived by HRTEM. A thin oxide epilayer on GaAs has been identified and proposed as the key factor to solve the surface dangling bond problem. X-ray photoelectron spectroscopy (XPS) and Auger data show that Gd rich in the interface region is the essential part of the good quality MOS devices. It suggest that carefully controlled the initial growth conditions such as substrate temperature, source temperature and oxide growth rate will directly affect the electrical property of the MOSFET. |
