Font Size: a A A

Physical modeling and characterization of submicron SOI and bulk MOSFET devices

Posted on:2001-04-03Degree:Ph.DType:Dissertation
University:Washington State UniversityCandidate:Imam, Mohamed AbdelgalilFull Text:PDF
GTID:1468390014458558Subject:Engineering
Abstract/Summary:
A four-terminal physical subcircuit model for FB partially depleted (PD) and near fully depleted (nearFD) SOI CMOS devices is presented. The model accounts for the unique characteristics of PD devices associated with the drain (Vds) induced floating-body effects. Unlike other models, the proposed circuit model accounts physically for the back MOSFET device, and accurately predicts the bias dependence of the current kink in nearFD devices. It allows for proper capacitance scaling and more accurate simulations related to the front and back oxides/channels. Self-heating effects related to the low thermal conductivity of the back oxide are also included. The circuit model is SPICE compatible and provides insights for understanding optimal device design needs for high performance. A simple technique for extracting the model parameters is described. The model is verified by the good agreement of the simulation results with the experimental data. The predictive capabilities of the subcircuit model are supported by circuit level simulation examples.; A simple analytical threshold voltage model for short-channel fully depleted (FD) SOI MOSFETs has been derived. The model is based on the analytical solution of the two dimensional potential distribution in the silicon film (front silicon), which is taken as the sum of the long-channel solution to the Poisson's equation and the short-channel solution to the Laplace equation, and the solution of the Poisson's equation in the silicon substrate (back silicon). The proposed model accounts for the effects of the back gate substrate induced surface potential (SISP) at the buried oxide-substrate interface which contributed an additional 15–30% reduction in the threshold voltage for the devices used in this work.; A modified Berkeley short-channel IGFET model (BSIM1) has been developed to accurately model the I-V characteristics and circuit performance of deep submicron MOSFET devices. The improved model provides a simple and more efficient parameter acquisition procedure for MOSFET global modeling in comparison to the original BSIM1 model. (Abstract shortened by UMI.)...
Keywords/Search Tags:Model, MOSFET, SOI, Devices, Circuit
Related items