| Power consumption has become an important design target in today's integrated circuits (IC) systems. Low power consumption can be achieved by exploring the design space at various levels throughout a design process, such as system (software and hardware), architecture, gate, circuit and physical level. Power dissipation can be decreased by different techniques, such as scaling down the supply voltage, shrinking the sizes of transistors, or reducing the switching activities of components. In this work, low power design techniques are proposed at various design levels. At the system level, we present a three-phase framework to minimize energy consumption of running tasks on variable voltage processors. In the framework, we integrate task scheduling, voltage selection and voltage determination together to maximize energy saving on variable voltage processors even when energy overhead due to transitions cannot be ignored. Experiments on different task sets and systems show that our framework is very efficient and it can slow down 7–98% of task cycles. Our approach also considers the energy overhead and can decrease the number of transitions by 32% and saves more energy compared to a fixed ordering of voltages. At the software level, data referencing during program execution can be a significant source of energy consumption, especially for data-intensive programs. In this work, we propose an approach to minimize such energy consumption by allocating data to proper registers and memory. Through careful analysis of boundary conditions between consecutive blocks, our approach efficiently handles various control structures including branches, merges and loops, and achieves the allocation results benefiting the whole program. The computational cost for solving the allocation problem is lower compared with known approaches while the quality of the results is very encouraging. At the gate level, we present a unified cell selection approach to minimize power consumption of combinational circuits on complete and incomplete libraries. For the complete library case, we present a polynomial algorithm to solve the low power cell selection problem. Our mixed integer linear programming (MILP) formulation on incomplete libraries selects cells with different gate sizes, supply voltages and threshold voltages simultaneously. Experimental results on benchmarks mapped to different libraries, including an industrial library, show that our technique achieves greater power savings than competing approaches. |
