Particle Filtering Programmable Gate Array Architecture for Brain Machine Interfaces

Decoding algorithms for brain machine interfaces map neural firing times to the underlying biological output signal through dynamic tuning functions. In order to maintain an accurate estimate of the biological signal, the state of the tuning function parameters must be tracked simultaneously. The evolution of this system state is often estimated by an adaptive filter. Recent work demonstrates that the Bayesian auxiliary particle filter (BAPF) offers improved estimates of the system state and underlying output signal over existing techniques. Performance of the BAPF is evaluated under both ideal conditions and commonly encountered spike detection errors such as missed and false detections and missorted spikes.;However, this increase in neuronal signal decoding accuracy is at the expense of an increase in computational complexity. Real-time execution of the BAPF algorithm for neural signals using a sequential processor becomes prohibitive as the number of particles and neurons in the observed ensemble becomes large. However, throughput is significantly increased by utilizing a parallel hardware architecture. This research describes a parallel processing architecture for implementing the BAPF in a field programmable gate array (FPGA) for real-time neural signal processing. While clock rates of FPGAs are inherently slower than those of conventional sequential processors, data rates are greatly enhanced when configured to simultaneously carry out computations in parallel.