Heterogeneous Reconfigurable Computing Architecture And Its Implementation Technology

In the fields of radar,communications,deep learning,artificial intelligence,and etc.,the complexities of the algorithms are increasing,with the structures of the algorithms varying.Heterogeneous reconfigurable computing platforms with low power consumption and miniaturization are urgently needed on more and more scenarios.In this paper,a heterogeneous reconfigurable computing architecture that combines a central control node,data switch node,and multiple GPUs is designed for the above applications,and a hardware and software prototypal platform that follows this architecture is designed.This architecture supports hardware reconfigurability by using advanced RC-MPSOC devices as central control node.And by adopting interconnected networks which support both star and ring network,the proposed architecture can achieve flexible,high-speed interconnection between heterogeneous computing nodes.The architecture and prototypal platform are characterized by miniaturization and low power consumption,and can provide flexible and efficient algorithm implementation capabilities.In terms of hardware design,the heterogeneous reconfigurable computing prototypal platform designed in this thesis follows the 6U standard and meets the requirements of low power consumption and miniaturization design.XILINX's advanced Zynq SOC is used as a central control node for the platform,in addition to the online adaptive reconstruction of software,it enables programmable logic(PL)to be hardware reconfigurable via ARM processor.XILINX's Kintex-7 series FPGAs is used as the switch nodes,which connecting the computing nodes,they achieve both the high-speed ring network among the GPUs and the high-speed star network between the GPUs and the central control node,so that it supports flexible algorithm structure.NVIDIA's TX1 modules are employed as the computing nodes to provide flexible and efficient algorithm implementation capabilities.Based on the prototypal hardware platform,the internal interface provided by Zynq SOC is used to implement the reconfigurable function module in software.The switch nodes are designed by implementing high-speed data exchange between PCIe and SRIOs,which constructs the computing node interconnection network.And the storage management function module implements flexible storage allocation.Functional testing and performance evaluation of these modules are then carried out.Thus a complete interface driver and basic functional modules can be provided for the heterogeneous reconfigurable computing platform to be applied in engineering.Finally,for the characteristics of large amount of data,large amount of computation,and complex structure of the concentric circle algorithm in SAR echo simulation,the slope distance calculation is allotted to four GPUs,and then the convolution operation is carried out at the central control node's PL.Compared with traditional heterogeneous computing platforms,this heterogeneous reconfigurable computing platform's computing performance improves significantly.The computing capacity of the platform can be further increased through multi-board stacking.so that it has good scalability and certain application prospect.