Development of III-Sb based technologies for p-channel MOSFET in CMOS applications

The continuous scaling of silicon CMOS predicts the end of roadmap due to the difficulties such as that arise from electrostatic integrity, design complexities, and power dissipation. These fundamental and practical limitations bring the need for innovative design architectures or alternate materials with higher carrier transport than current Si based materials. New device designs such as multigate/gate-all-around architectures improve electrostatics while alternate materials like III-Vs such as III-As for electrons and III-Sbs for holes increase operational speed, lower power dissipation and thereby improve performance of the transistors due to their low effective mass and faster transport properties. Further, application of compressive strain on InxGa1-xSb modifies band structure enhancing hole mobility on par with its rival Germanium. This band structure modification lowers in plane hole meff* improving carrier transport thereby lowering power dissipation and increasing operational speed of future CMOS technology.;This work studies optimization of thick GaSb layers grown on GaAs with the goal of improvement of growth, surface quality and achieve high hole mobility. Quality of growth is evaluated using atomic force microscopy (AFM) and electrically assessed using Van der Pauw (VdP) Hall method and capacitance-voltage measurements. After optimizing, the best top surface with average roughness (Ra) of ∼0.37 nm and spiral type ''step-flow'' growth mode in MBE was observed on the GaSb structure where initial 0.5 mum grown at 410°C and the top 0.5 mum grown at 485°C obtaining hole mobility of 737 cm2/V-s and 3.2 kO/sq at 2.7x1016 cm-3. N- and p-type GaSb MOSCaps with reasonable capacitance--voltage (C--V) characteristics at room temperature (RT) were demonstrated using all in-situ 0.5 nm a-Si interface passivation layer (IPL) and 10 nm Al2O3/HfO2 or Al 2O3. Amorphous-Si IPL was found essential for n-MOSCaps but not in the case of p-MOSCaps where comparable C--V characteristics with a similarly low Dit∼1--2x1012 cm 2eV-1 were demonstrated without IPL.;Next, biaxial compressive strain on InxGa1-xSb quantum wells were studied by varying In composition and studying Hall mobility to understand major scattering mechanisms in surface and buried MBE grown strained InGaSb quantum well (QW) MOSFET channels with in-situ grown Al 2O3 gate oxide are analyzed as a function of sheet hole density, top-barrier thickness and temperature. Mobility dependence on Al0.8Ga 0.2Sb top-barrier thickness shows that the relative contribution of interface-related scattering is as low as ∼30% in the surface QW channel. An InAs top capping layer reduces the interface scattering even further; the sample with 3 nm total top-barrier thickness demonstrates mobility of 980 cm2/Vs giving sheet resistance of 4.3 kO/sq, very close to the minimum QW resistance in the bulk. The mobility--temperature dependences indicate that the interface-related scattering is dominated by remote Coulomb scattering at hole densities <1 x 1012 cm-2 . Using the above structures, 'gate-last' and 'gate-first' technology processing has been developed for fabrication of MOSFET devices keeping low-thermal budget in mind.;Finally, growth of III-Sb on silicon has been studied with the goal to improve the quality of group III-antimonide heteroepitaxial materials for III-Sb CMOS to assess various metamorphic buffer layer technologies, evaluate baseline for density of related defects and surface morphology, uncover their effect on electrical properties, provide baseline for futuristic growth of III-V integration on a common platform.