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System and circuit issues in high-speed, highly integrated wireless receivers

Posted on:2003-09-22Degree:Ph.DType:Dissertation
University:University of Toronto (Canada)Candidate:Mirabbasi, ShahriarFull Text:PDF
GTID:1468390011488044Subject:Engineering
Abstract/Summary:
The increasing demand in the industry for affordable and portable wireless communication systems has motivated substantial research in the realization of monolithic transceivers. The use of low-cost CMOS technology is of particular interest since it provides the possibility of integrating analog and digital circuitry on the same chip. The trend toward shifting more complexity from the analog to the digital domain in favour of robust and flexible performance suggests that more functionality should be implemented in the digital domain. Of particular interest is channel selection filtering, an essential function of any receiver. Moreover, the recent surge in high-data-rate wireless applications points to the use of spectrally efficient modulation methods including quadrature amplitude modulation (QAM) and mulicarrier modulation schemes such as orthogonal frequency division multiplexing (OFDM).; In this work, some techniques regarding low-cost, high-speed, highly integrated wireless communication receivers are presented at both the system and the circuit level. These techniques are also applicable to wire-line counterpart systems.; The first contribution made in this work is the presentation of the hierarchical quadrature amplitude modulation (HQAM), a new spectrally efficient modulation scheme. This modulation scheme is especially suitable to be used in conjunction with highly integrable receiver architectures that suffer from dc-offset problems and performance degradations due to 1/f noise, particularly in CMOS implementations. Furthermore, for a given Nyquist bandwidth of the analog-to-digital converters used in the receivers, receiver architectures using the HQAM scheme achieve approximately twice the data rate that is possible with the low-IF receiver architecture using the conventional QAM scheme.; Next, a simple procedure for the design of a highly selective finite impulse response (FIR) prototype filter for a class of overlapped complex-modulated transmultiplexers has been presented. The design method is unified for all values of the overlap factor. The high stop-band attenuation and fast side-lobe fall-off rate of the designed filters make the proposed filters suitable candidates for high-speed data communication applications employing multicarrier modulation.; In the context of baseband digital channel selection, the realization of a combined delta-sigma decimation, channel-selection, and approximate Nyquist pulse-shaping filter is described. Implemented in a 0.18 μm 1.8V CMOS standard digital process, this is the first reported digital filter that performs all three functions in a single unit. The 0.1 mm2 filter uses efficient multiplierless infinite impulse response structure, which results in a low-power, small-area realization. The filter consumes 6.4 mW (26.8 mW) at 64 MHz (240 MHz) oversampling frequency.
Keywords/Search Tags:Wireless, Highly, Receiver, Realization, Filter, High-speed
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