Optimization of SST SuperFlash cells programming speed and uniformity based on analytical gate current model using two-dimensional analysis

An analytical model for the programming of Silicon Storage Technology (SST) SuperFlash cells is presented to optimize programming efficiency and uniformity. Due to SST cells' special split-gate configuration, existing single gate channel hot electron injection model is not valid for the SST programming. Two-dimensional analysis of electric field distribution is indispensable for SST duel gate source-side-injection programming. Based on Lucky-Electron concept, the floating gate current and substrate current models are developed with the electric field distribution by two-dimensional analysis. Modeling results are verified with 2D device simulation and current measurement on special-designed cells with floating gate contacts. The time to program model is further derived as a direct indication of programming speed. The bias difference between the drain and the control gate and the coupling ratio of the floating to the control gate turn out to be the most important parameters that determine the programming speed. The high sensitivity of time to program to the coupling ratio and distribution of coupling ratio due to process variation indicate the non-uniformity of SST cells programming. With the aid of the time to program model, the distribution of SST cells programming speed can be predicted and optimization guideline can be obtained. The model shows that higher bias difference between the drain and the control gate and lower coupling ratio give better programming uniformity.