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Development of ULSI technologies with optimized stresses in silicon device structures

Posted on:2003-10-22Degree:Ph.DType:Dissertation
University:The University of Texas at DallasCandidate:Loiko, Konstantin ValeryevichFull Text:PDF
GTID:1468390011484214Subject:Engineering
Abstract/Summary:
In this work, stress-related effects in silicon device manufacturing are characterized. Methods for technology optimization are developed to minimize stress and improve device performance.; Narrow mask and narrow space effects in LOCOS isolation are studied.; A novel experimental scheme is designed to measure silicon nitride viscosity.; The impact of the LOCOS stress effects on isolation efficiency and active devices is studied. A model for an anomalous narrow-width effect in MOSFETs with LOCOS isolation is developed. A methodology for the analysis of isolation built-in reliability, giving prompt and reliable quantitative results, is created. A method for the compensation of the narrow-width effect and self-adjustment of narrow-channel transistor threshold voltage is proposed. It significantly improves device characteristics and isolation performance.; Mechanisms of crystal defect generation during local oxidation of silicon are investigated. The observed correlation between densities of stacking faults, dislocations, and junction leakage currents is attributed to the plasma-induced damage to the silicon surface. This damage can be eliminated using a lower ramp-up rate during field oxidation or carrying out the oxidation in a dry ambient, which also reduces stress.; Dislocation motion in silicon is found suppressed by oxidation. This is attributed to the elastic interaction of dislocations with self-interstitials. Theoretical calculations and computer simulations show that self-interstitials can form quasi-equilibrium atmospheres around dislocations moving together with them. This causes dislocation stress reduction and therefore screens dislocations from interaction with external stresses.; A model is developed for the for the stress-induced redistribution of point defects in silicon device structures, which takes into account stress-dependent diffusion and surface generation-recombination of point defects. The model is successful in explaining such phenomena as stress-induced cavity formation, stacking fault growth, and stress-mediated dopant diffusion.; The formation of cavities in silicon under patterned nitride films is studied experimentally. For the first time, the development of stress-induced trenches is observed. From simulation, the surface self-diffusion coefficient is obtained for silicon. A satisfactory correlation between the experimental data on the trench volume and corresponding simulation results indicates that the stress-induced surface diffusion of silicon atoms is a probable mechanism of the cavity and trench growth in silicon. (Abstract shortened by UMI.)...
Keywords/Search Tags:Silicon, Stress
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