Applying the logarithmic number system to application -specific designs

When designing a microprocessor, the choice of a given arithmetic greatly impacts characteristics such as the implementation of the functional units, the required word size, and even the optimum algorithms that can be used. The diversity of products that incorporate a microprocessor makes the best choice application or system dependent. The Logarithmic Number System (LNS) allows very fast, power-saving implementations for certain arithmetic operations such as multiplication, division and squaring. Using this number representation can provide very important savings in area and power consumption, as well as higher speeds for a variety of algorithms. Previous research has been conducted in this area, but LNS has not yet been acknowledged as a viable alternative by the market. This is probably due to the fact that often results obtained with LNS are very similar to those obtained with floating point. But LNS lacks the extensive practical experience and well-established standard that exist for floating point.;This dissertation proposes a methodology for successfully exploiting LNS in application-specific designs. The methodology is targeted to those applications where LNS can offer a significant advantage over floating point. This requires a detailed analysis of the characteristics that make an application suitable for LNS implementation and a detailed comparative study of different LNS and alternative arithmetic units. The focus is centered on applications with certain instruction mixes and low precision requirements. Tools are provided that allow obtaining efficient hardware configurations automatically for a given application, and emulation of the numeric results that the proposed hardware yields. Use of emulation and statistical analysis represents the core of the proposed methodology. Hardware-software codesign is extensively used, allowing great simplification in the arithmetic implementations. Performance is maintained as long as software solutions exist for occasionally incorrect hardware performance.;Interval arithmetic and model predictive control are studied using the proposed methodology. The characteristics of silicon area, speed of computation and precision are compared to state-of-the-art implementations using conventional number systems. This results in two novel applications: interval LNS and embedded hybrid model predictive control.