Novel interface based on the gating signal averaging method for accurate hardware-in-the-loop testing of digital controllers for power electronics applications

A novel interface based on the gating signal averaging (GSA) method was developed to minimize the inaccuracies presented in real-time simulations of power electronics systems. A reliable, versatile, and affordable hardware-in-the-loop (HIL) testing platform is attained by combining the computing capabilities of the proposed interface and the flexibility and low-cost of the real-time extension of the Virtual Test Bed (VTB-RT).; HIL testing has become an effective tool for the rapid prototyping of digital controllers. However, interfacing the digital controller under test with a real-time simulation of power electronic systems presents challenges because these systems usually contain switched circuits whose inputs---the controller's gating signals---are not necessarily synchronous with the simulation time step. Several methods have been proposed to address the lack of synchronization that causes unacceptable inaccuracies in the real-time simulation results; however, these approaches introduce unnecessary delays and generate artificial harmonics. Moreover, most existing HIL platforms are costly and insufficiently flexible for accommodating diverse system scenarios.; In this work, the proposed interface is implemented on a field programmable gate array (FPGA), which enables the simulation platform to attain simulation accuracy levels not possible to obtain with a software-only approach, i.e., 0.005% accuracy of the switch duty for a 5 kHz switching frequency (200us switching period), even when the simulation executes in 50 us time steps. The design and implementation of the FPGA-based interface are discussed and several application examples are presented to demonstrate the effectiveness of the resulting HIL testing platform.