Charge trapping characterization methodology for the evaluation of hafnium-based gate dielectric film systems

Scaling of advanced CMOS device dimensions, as set forth for future technology nodes by the International Technology Roadmap for Semiconductors (ITRS), will require reduction of the equivalent oxide thickness (EOT) of gate dielectrics below a point that can be physically realized using silicon dioxide. In order to continue EOT scaling below ∼1.5nm and reduce gate leakage current, higher dielectric constant materials will be needed to replace SiO₂. Hafnium-based dielectrics are being widely investigated as potential candidates for the gate dielectric application. Their charge trapping characteristics were identified as a primary issue preventing the introduction of Hf-based materials into CMOS technology, potentially causing threshold voltage instability and mobility degradation.; Several measurement techniques can be used to study and quantify charge trapping: Capacitance-Voltage (C-V) hysteresis, alternating stress and sense V_fb/V_t instability, charge pumping (CP), and fast transient I_d-V_g (FT) measurement. The two most promising techniques are CP and FT measurements. Fixed-amplitude (FA) CP can measure interface state densities, while variable-amplitude (VA) CP can measure trap densities in the high-κ bulk. In the FT measurement, the shift of the I_d -V_g curves generated by the up and down swing of a trapezoidal pulse (i.e., ΔV_t) corresponds to the amount of the trapped charge. By using these two measurement approaches on varying physical thicknesses of Hf-based gate dielectric stacks, the impact of interfacial and bulk high-κ charge-trapping properties on device performance (i.e., mobility) was investigated.; Fixed-amplitude CP gives low interface state densities for all depositions indicating good interface passivation, whereas VA CP and FT shows large trap densities in the bulk of the high-κ layer. Results demonstrate that the bulk trapping in the high-κ film contributes to the degradation of device performance. Using fast transient measurements and analysis, trapped charge and free-carrier mobility can be extracted allowing characterization of the “trap free” mobility, which is quite close to the universal electron mobility curve in the high field regime for process conditions of interest.