On the interdependence of substrate coupling on technology, circuit, and physical design in mixed-signal smart-power circuits

Multi-million transistor digital systems have become commonplace, and the number of transistors is expected to increase further as described by Moore's law. Systems-on-a-chip (SOC) is a new trend intended to exploit the advantages offered by deep submicrometer (DSM) CMOS technologies. An SOC is a complex mixed-signal circuit composed of analog, digital, high power, low voltage, and/or high voltage circuit blocks, all of which must coexist with minimal interaction.; An important parasitic interaction among circuits sharing a common substrate is substrate coupling noise (SCN). SCN may affect the signal integrity of both the digital and analog portions of a circuit. During the past decade, the tolerance of analog circuits to substrate coupling noise has been investigated. The effect of substrate coupling noise on digital circuits is the focus of this dissertation, particularly targeting mixed-signal applications. The research described in this dissertation can also be seen as a starting point for a research problem that will become significant in the near future: substrate coupling noise in multi-million transistor DSM digital applications.; The experimental results derived from test circuits and described in this dissertation address the most common, lowest cost semiconductor technologies: NMOS and N-well CMOS. The primary focus is on developing circuit and physical design solutions to improve the tolerance of digital circuits to substrate noise, targeting low cost SOCs and multi-million transistor DSM digital applications.; Design solutions for reducing the substrate noise interacting with the circuit are presented. Circuit and physical design techniques are provided to decrease the noise that is generated, transmitted throughout the substrate, and received by the digital circuits. Solutions to improve the noise behavior of digital circuits by tolerating larger amounts of noise are demonstrated. Theoretical expectations are compared with simulation and experimental data for both NMOS and CMOS circuits. While the research presented in this dissertation primarily addresses digital circuits, these results can also be used to enhance the immunity of analog circuits to substrate coupling noise.