Reconfigurable system is a software-hardware mixed system. It generally contains microprocessor as the primary controller of the system and several reconfigurable hardware blocks as accelerators. It provides a platform integrating the flexibility of the microprocessor and the performance of dedicated hardware circuits, hence becomes a promising solution for the embedded system applications.The major research of my thesis are:Firstly,To address the platform of heterogeneous multi-core reconfigurable computing architecture, this thesis implements a hardware transparent programming model for reconfigurable system development, which provides hardware functions similar to software functions for designers to use the hardware accelerators , it hides the details of underlying hardware accelerators and makes easy for designer to use. Secondly, compared with microprocessor clock cycle time, reconfigurable hardware configuration time was too long. The reconfiguration delay plays an important part in slowing down the total execution time of the reconfigurable system. To address the problem of such expenses, we analyze the calling frequency of each function, combined with the runtime and hardware space requirement. Then we apply the pre-configuration algorithm in order to overlap the configuration and computation of the hardware functions, leading to the reduction of the configuration overhead and the improvement of system performance.Finally,We make some experiments to verify the proposed method and algorithm. At first, a DES hardware function is implemented and tested. The result shows that the operating system with hardware transparent programming works properly. Then the pre-configuration algorithm is applied and the total scheduling times of the system are compared. The result shows that the pre-configuration algorithm can reduce the configuration overhead and improve the system performance. |