Reading between the Bits: Uncovering New Insights in Data for Efficient Processor Desig

Three emerging trends pose challenges to the design of efficient processors. First, applications are executing on strictly energy-constrained hardware due to the rise of IoT and mobile computing. Traditional architectures expend a great deal of energy providing exactness despite the approximate applications that often run on these systems. Second, data sets are growing to enormous proportions due to the rapid gathering of user information in modern devices. We can no longer rely on data being readily available in on-chip computer storage. Third, active chip area is diminishing at smaller technology nodes due to power density limitations in process technology scaling. We can no longer fully utilize all on-chip hardware resources simultaneously.;Our research tackles these challenges by recognizing that they stem from fundamental gaps in the way that data is contextualized in hardware. The goal of a processor is to process real-world information; yet in modern computers, hardware perceives data as nothing more than bits. Can the hardware tell if an integer is purely numerical or if it will be used as a memory address later? Can it tell that two elements are adjacent in a multidimensional data structure even though they are not stored contiguously? Can it tell if contiguous data elements will be accessed at the same time or accessed independently? Traditionally, hardware cannot interpret data bits on their own; it only interprets data bits by how instructions use them. It lacks an understanding of what information is encoded in the bits (functional context), where that information is located (spatial context), and when that information is needed (temporal context). Our research fills these gaps in data context to address the three challenges, recognizing that 1) functional context enables approximation for greater efficiency under tight energy constraints; 2) spatial context demystifies patterns and correlations to more efficiently and concisely process massive data sets; and 3) temporal context infers the criticality of data to allow for better utilization of precious on-chip resources.