Research On Hardware Resource And Task Model Of High Performance Computing Architecture Based On FPGA

High performance computing level can reflect the national comprehensivestrength, becoming one of the key technologies that support national powersustainable development. In recent years, as the change of the technology ofarchitecture high performance computer, heterogeneous architecture has become themajor trend of the future high performance computer development. As the newarchitecture, the reconfigurable computing architecture based on FPGA, make thesystem with the high performance of the hardware, samely with the flexibility ofsoftware. The computing task is mainly finished by computing accelerator ashardware task, while the task management, finished by general processor to achievethe optimal computing effects by adopting the main processor and co-processortechnology.This paper mainly performs the research and analysis on the hardware task andresource management, computing model of heterogeneous high performancearchitecture based on FPGA computing accelerate. With the analysis of developmenttrend of current high performance system architecture, aiming at the heterogeneoushigh performance computing platform, through the FPGA computing accelerate, thecomputing accelerate ratio of FMM algorithm used to solve the N-body problem.The multi-level computing accelerate optimization scheme and computingarchitecture is proposed according to the computing effect og the FPGA computingaccelerate.As resource management is the basis of the task scheduling, to hardwareresource management of FPGA is to find all set of the free rectangles named MFRon FPGA rectangle area. We use two methods respectively state matrix model andrunning hardware task edge line model to compute all set of the MFRs. Based on thestate matrix model, a two-way inverted tower based MFR all set scanning algorithmis putforward and the scanning optimization algorithm and M value markingoptimization algorithm are also given. On the basis of running hardware task edgeline model, a MFR all set seeking algorithm based on CPTR is proposed. And thenbased on this model, in this paper, the resource management algorithm based onCPTR on run-time hardware task schedule is given.Most of the high performance computing platform belongs to publiccommercial computing platform that providing computing services for many highperformance computing users. Aimimg at the multi-level of the task schedule modelon high performance computing platform, a hardware task schedule and placementalgorithm and system is proposed on the basis of context of time and area namedCBTA of FPGA resource. According to the current different status of each task andresource context, we put forward and adopt different task placement and schedulealgorithms to adapt the matching of each task context amd resource conext. A self-adaptive task scheduling strategy is adopted is that Based on the dynamictransformation of the resource context status of the computing node, the node taskscheduler select task that corresponding to its context status. In order to improve theresponse time of the task schedule, the parallel optimization strategy is adopted inthe task schedule of CBTA. Finally through the experiment, the advantage of CBTAon response time, load balance and task reject ratio is shown.