A quasi-linear interpolation method to develop a direct digital frequency synthesizer with VLSI implementation

Using piecewise polynomial interpolation method in designing Direct Digital Frequency Synthesizers (DDFS) can result in compact and low power VLSI chips. In this dissertation, a novel method called Quasi Linear Interpolation (QLIP) is introduced where a combination of piecewise linear and even second order polynomials is used to construct the DDFS. It is shown that the ¾ of the segments have to be interpolated by the even second order polynomials and the remaining ¼ of the segments have to be interpolated by the linear polynomials to obtain the maximum Spurious Free Dynamic Range (SFDR). In addition to the above design, a novel mathematical method is introduced to evaluate the (SFDR) upper bound of the DDFS systems realized by arbitrary piecewise polynomial interpolation techniques. Using the SFDR upper bound, the optimization strategy can be tuned to achieve the SFDR of the final quantized design as close to the theoretical upper bound as possible.