| It has been widely accepted that hafnium-based gate dielectrics are the most promising high-permittivity candidates to replace silicon oxide to continue the CMOS technology scaling trend. However, nearly all transistors made of hafnium based gate dielectrics so far exhibit mobility degradation, compared to their SiO2 counterparts. This dissertation research focuses on two parts: (1) to understand critical mobility degradation mechanisms in MOSFET's with hafnium-based gate dielectrics through characterization and analysis; (2) to predict ultimate device performance for short channel transistors fabricated on SOI substrates with metal gate/high-kappa gate dielectrics.; Mobility degradation is a critical concern for MOSFET's made with high-kappa gate dielectrics, which should be understood and overcome before their implementation in CMOS technology. The scattering mechanisms are relatively well understood for carriers in MOSFET's gated with conventional SiO2. However, the channel mobility of MOSFET's made of high-k gate dielectrics appear to be generally lower than what one might expect from the aforementioned scattering mechanisms. With the newly developed mobility characterization technique, we observed the following in high-kappa gated MOSFET's: (1) Coulomb scattering, caused by oxide charge and charged interface traps, is a major cause of the degraded channel mobility, but it does not account for all of the degradation. (2) Strong evidence shows additional phonon scattering beyond that caused by phonons in the silicon substrate. The additional phonon scattering mechanism is consistent with the "remote phonon scattering mechanism" caused by soft optical phonons in high-kappa gate dielectric, as proposed theoretically by Fischetti et al. at IBM.; Although extensive work is in progress to introduce metal-gate electrodes and high-kappa dielectric materials in semiconductor technology to continue the scaling trend, very few studies have attempted to evaluate impacts of gate electrode work function and high-kappa gate dielectrics on short-channel device performance. With a two-dimensional numerical simulator, the gate dielectric permittivity and metalgate work-function tradeoff in short channel devices has been studied. The results show that the optimal gate work-function range is within 110meV below the conduction band edge for 25nm SOI nMOSFET's, and 90meV above valence band edge for pMOSFET's. |
