Analog-to-digital conversion via time-mode signal processing

Conventional voltage-mode analog-to-digital converters use voltage amplifiers, voltage comparators, and switch capacitor networks to perform their signal processing. When compared to digital circuitry, these analog circuit blocks consume significant power, occupy large silicon areas, and operate at relatively slow data processing speeds. A signal processing methodology is proposed that performs analog-to-digital conversion on voltage signals while implementing all the circuits in a digital CMOS logic style. This methodology, called time-mode signal processing, uses time-difference variables as an intermediate signal between the input voltage and digital output. The resulting silicon devices offer very compact, low power, high-speed, and robust analog-to-digital converter alternatives.;There are five main analog-to-digital converter topologies: flash, successive-approximation, pipeline, delta-sigma, and integrating converters. Each converter topology is presented in the context of the time-mode signal processing methodology. The circuits that implement each time-mode data converter are described and when appropriate system-level, transistor-level, and experimental results are revealed.;Three integrated circuits (IC) were fabricated in a 0.18-microm CMOS technology to demonstrate the feasibility of the time-mode ADC methodology. The first IC implemented the time-mode comparator and a time-mode flash ADC. The time-mode delta-sigma ADC design was demonstrated in the second IC. Two circuits were implemented in the third IC: a differential-input time-mode delta-sigma ADC and a cyclic (or algorithmic) ADC.