Investigations On RF Transceivers And Related Integrated Circuits For A New Generation Broadband Wireless Internet

With the advent of the network era,user demand expands from sole web-browsing and e-mail to HD video streaming and high-speed download,which means that the data rate must be boosted up significantly.The target data rate of IEEE 802.11ac(5GHz)standard is no less than 1Gbps.It benifts from new features,such as wider channel bandwidth,a higher-order modulation scheme,more spatial streams and MU-MIMO.The RF transceiver must have higher performance in terms of bandwidth,noise,and linearity to cope with the challenges mentioned above.This paper is focusing on system integration and miniaturization.On the other hand,millimeter wave(30-300GHz)becomes a research hotspot for the next generation communication because it can provide wide bandwidth and have not been developed on a large scale.Adaptive beamforming Technology is the key technology of millimeter wave communication.Switches and attenuators are devices that are widely used in this technology,but they are rarely reported.They are also the focus of this paper.The dissertation is organized as follows:1)The impacts on the transceiver performance due to the RF circuits' impairments are analyzed based on IEEE 802.11ac(5GHz)standard.An effective optimization scheme is proposed and a 8×8 MIMO wideband RF transceiver subsystem for 802.11 ac standard is designed.The transceiver works in a TDD mode with a 5.8GHz central frequency and a 80 MHz channel bandwidth.Measurement demonstrates the capability to operate over a long range of 80 m at a high data rate of 1 Gbps,due to its 23 dBm maximum linear transmitted power,6 dB noise figure and 50 dB dynamic range at the receiver side,together with the 8 dBi high gain antenna.This work has been published in the international journal Microwave Journal.2)Theoretical analysis about the unconditional stability region of a power amplifier is given.The power amplifier is designed using load-line matching methodology,which is simpler than the traditional way using load-pull matching.Chip fabrication and measurement verification have been conducted based on 0.25 ?m GaAs pHEMT technology.From the measurement results,the power amplifier has a 26 dB power gain and a +22 dBm output 1dB compression point,while the amplifier is unconditionally stable over the working frequency.3)The capacitive compensation has been proposed to minimize the size and reduce the imperfect balance of the planar spiral transformer type balun used in the double balanced mixer.Lumped capacitors and inductors are adopted in the core mixer to filter out the unwanted frequencies.The LO isolation is greatly improved with a reasonable conversion gain.From the measurement results,the mixer has a-7 dB down-conversion gain,a-5.4 dB up-conversion gain,a 4-7.5GHz RF 3dB bandwidth,a 0.3-3GHz IF 3dB bandwidth and a better than 35 dB LO isolation,which is better than a typical commercial chip.4)Aiming at the problem of a low isolation and large insertion loss of mmw switch,a new compact distributed structure of the switch is proposed.This structure using the FET as a part of the transmission line to minimize the harmful parasitic inductance and widen the operation bandwidth.On the other side,the power performance is improved by using the stacked FETs technique.The circuit design process and the experimental verification are given based on a 0.1 ?m GaAs pHEMT technology.From the measurement results,the switch operates at the frequency range of 35–70 GHz with less than 3 dB insertion loss and more than 40 dB isolation.The switch demonstrates a 1 dB insertion loss compression with a +20.2 dBm input power at 31 GHz.The isolation is larger than 30 dB from 10 to 95 GHz.To the best of the authors' knowledge,this broadband isolation performance is among the best of the reported SPDT switches.This work has been published in the international journal IEEE Microwave and Wireless Components Letters.5)Aiming at the problem of extra system power consumption due to the large insertion loss of an attenuation device,a method to reduce the insertion loss is proposed.The insertion loss of the LSB(less significant bit)is improved by removing the series FET and resistance and replacing the parallel resistance with capacitance of the traditional switch T-type attenuator.The circuit design process and the experimental verification are given based on a 0.15 ?m GaAs pHEMT technology.From the measurement results,the 6-bit attenuator operates at the frequency range of 40–50GHz with 6.5 dB insertion loss at 40 GHz and less than 0.8dB RMS amplitude error.To the best of the authors' knowledge,this is the first 6-bit digital attenuator working at Q-band with a maximum attenuation range of 31.5 dB.Attenuator with low phase shift can avoid system tracking errors and additional calibration work.A reflection attenuator with the proposed novel loads is used as MSB(more significant bit)to attain low phase variation and low insertion loss.Simulation results show that the phase shift and insertion loss performance of the new MSB is significantly improved.The circuit design process and the experimental verification are given based on a 0.15 ?m GaAs pHEMT technology.From the measurement results,the 6-bit attenuator operates at the frequency range of 30–35GHz with a less than 3.7dB insertion loss and a less than 11o RMS phase error.It also demonstrates a 1 dB insertion loss compression with a +24.65 dBm input power.A part of this work has been published in the international conference IEEE Asia Pacific Microwave Conference.