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Research On Key Technologies Of Multi-octave Ultra-broadband Receiver Chip

Posted on:2021-05-19Degree:DoctorType:Dissertation
Country:ChinaCandidate:J Q HuFull Text:PDF
GTID:1368330623958191Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
The demand of broadband receiver front-end is increasing along with the development of the broadband and multi-mode wireless communication systems,high-speed data transmission,test instrumentation,optical communications,etc.This dissertation focuses on the research on key technologies of multi-octave ultra-broadband receiver chip,including the design methods of broadband low-noise amplifier?LNA?and broadband mixer.The main contents of the dissertation include:?1?To realize integration of on-chip biasing circuit for a broadband LNAs,a basing circuit solution for ultra-broadband circuit from several megahertz?MHz?to decade gigerhertz?GHz?is proposed.The proposed biasing circuit exhibits good RF chocking characteristic in a broadband frequency range.By making full use of the dc characteristics of the GaAs pHEMT transistor,the resistance of the proposed biasing circuit is adjustable when it is used as a load.The principle of the proposed biasing circuit is analyzed in detail.?2?Based on the sumarized design methods of broadband LNA,several ultra-broadband LNAs are proposed,designed and implemented.a.An alternative broadband LNA unit cell is proposed,with which the cascaded LNA can obtain comparable bandwidth with smaller chip size and higher unity gain compared to distributed amplifier.The proposed LNA unit is based on proposed combination technique of bandwidth extension,including a cascode topology with shunt-resistive feedback and a dual inductive-peaking technique?CT-SRF&DIP?,the proposed IABC and a LC-ladder matching network.The dual inductive-peaking technique in CT-SRF&DIP significantly enhances gain flatness and improves the noise performance at high operation frequency.In addition,a gate capacitor added between the gate of the common-gate transistor and ground is optimized to further boost the gain and bandwidth at high operation band.Moreover,the IABC using pHEMT is introduced to realize on-chip integration of the biasing circuit to save chip area and application cost,and to support broadband RF biasing supply larger than seven-octave bandwidth from dc to 20 GHz.The LC-ladder matching network is used to simultaneously obtain low noise figure and high output power gain in a broad bandwidth.As a typical case,a broadband LNA with larger than seven-octave bandwidth without using DA topology is successfully implemented by using 0.15-?m GaAs pHEMT technology.b.A broadband LNA cell with frequency-dependent feedback loop?FDFL?and LC-ladder matching network is proposed.Through theoretical analysis in detail and design on purpose of introduced FDFL,both the flat gain and broad gain bandwidth are achieved without sacrificing the noise figure.Moreover,a well-designed LC-ladder broadband matching network is used to further improve both the noise figure and power gain of the proposed LNA simultaneously.The proposed techniques are analyzed theoretically and verified experimentally by a three-stage cascaded LNA with a bandwidth of 0.1 to 23 GHz.c.A 0.1 to 40-GHz broadband LNA is proposed.On the basis of conventional cascode structure,the proposed LNA achieves bandwidth extension at low operation frequency by employing the shunted feedback of resistor and capacitor.Meanwhile,both the series and parallel inductive-peaking inductors are used to delay and compensate the gain roll-off at high operation frequency,which significantly extends the bandwidth at high operation frequency.The principles of bandwidth extension are analyzed in detail from the aspects of time and frequency domain.d.A 0.1 to 50-GHz broadband LNA is proposed.To achieve low noise and significant bandwidth extension,a LNA,cascading a cascode amplifier with feedback and bandwidth extension techniques,and two cascode Darlington amplifier with feedback,is proposed.The bandwidth extension principles of proposed LNA are analyzed theoretically and verified experimentally.e.A 0.1 to 52-GHz amplifier is designed and fabricated using 0.15-?m E-mode GaAs pHEMT process.To extend the gain bandwidth,a triple cascode amplifier with resistive feedback is employed.Moreover,by introducing several inductors between the transistors,the gain flatness and noise figure are significantly enhanced.With several bandwidth extension techniques,the designed amplifier has the widest bandwidth with acceptable overall performance among all the earlier reported amplifiers fabricated using similar process.?3?The design methods of ultra-broadband mixer circuit are studied,and two broadband mixers MMIC are proposed,designed and implemented.a.A 0.1 to 5-GHz mixer core for cellular receiver application is demonstrated.The presented mixer core integrates the LO buffer,mixing cell,and IF amplifier fabricated using 0.5-?m E/D-mode GaAs pHEMT process.To realize broadband application,both the IF amplifier and LO buffer is designed using resistive feedback,which simplifies the external matching network.The designed mixer is housed in a 3 mm×3 mm12-lead QFN plastic package,and the performance are verified at the typical frequency of 800 MHz and 1.7 GHz.b.To address the contradiction between the bandwidth and linearity facing by the convetional distributed mixer,a complementary distributed drain mixer?CDDM?is proposed.The CDDM can achieve low conversion loss,broad bandwidth and high linearity simultaneously.The design procedures of CDDM are presented in detail.The proposed CDDM is verified by an implemented 0.1 to 50-GHz mixer with 5.8-dBm measured IP1dB.?4?On the basis of aforementioned broadband LNA and mixer,the LNA and mixer are integrated as a broadband receiver RF front end.The performance of designed RF front end is verified by on-wafer measurement.
Keywords/Search Tags:Broadband receiver chipset, broadband low-noise amplifier, broadband mixer, monolithic microwave integrated circuit (MMIC), GaAs pseudomorphic high electron-mobility transistor(pHEMT)
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