Hybird CMOS Memristor Logic Gates And Their Application In Digital Circuit Design

Memristor has many advantages such as small size,low power consumption,scalability and so on.Moreover,memristor has logic function due to its switching characteristics.The advantages of CMOS technology are high reliability,exact controllability,and large-scale industrial production.In addition,the process of memristor is compatible with that of CMOS technology.Thus,the hybrid designs with CMOS transistors and memristors,which have both advantages of CMOS technology and memristor,have very broad application prospects in storage,logic and neural networks.The hybrid designs will inject new vitality for breaking through the bottleneck of the microelectronic development.To enrich the logic design functions of memristor,and to further reduce the area of integrated circuits(ICs),this thesis designs some novel logic gates using both CMOS transistors and memristors,which have the features with small area,simple structure,and direct cascade.Then,these logic gates are applied in digital circuit designs,to verify the effectiveness of these designed gates.Firstly,this thesis designs some multi-input AND,NAND,OR and NOR basic logic gates using both CMOS transistors and memristors.In the novel logic gates,the use quantity of transistors is significantly reduced.This thesis analyzes the resistance state switching situations of memristors in multi-input logic gates,and then calculates the correct switch conditions that memristors must be satisfied.This work provides an effective reference for using memristors to design logic gates.On this basis,this thesis presents the design constraints of logic gates input port number,which is common limited by the input voltage and the attribute parameters of memristors.Simulating the designs with LTspice,experimental results show that the novel logic gates have correctly functions.Secondly,this thesis designs some compound logic gates such as XOR,XNOR,AOI and OAI gates with transistors and memristors.Through experimentation and reasoning,this thesis summarizes the design guidelines for the designed compound logic gates,which provide reasonable following conditions for the design of compound logic gates.In the design process,the design structure is optimized,and the logic function of the memory is fully excavated,so that the quantity of transistors in the structure is reduced significantly.At the same time,it necessary to carefully design the simulation experiments,so that could make the simulation results clearer,more concise,and more targeted.The experimental results verify that the novel compound logic gates have correct logic functions and well performance.Next,this thesis evaluates the potential of the designed logic gates in area reduction for combinational logic circuits.The logic gates are integrated into a 45nm open cell technology library.Then,this new library is applied to perform logic synthesis using Design Compiler(DC).Results for large ISCAS'85 and full-scan version ISCAS'89 benchmark circuits show that the proposed designs achieved about 28.97%reduction in area compared to those in CMOS designs.Finally,this thesis designs a novel D flip-flop by using hybrid CMOS and memristors,and perform logic synthesis by DC.For large ISCAS'89 benchmark circuits,experimental results show that the use of the proposed logic gates and D flip-flop can reduce the area of sequential logic circuits significantly,reached 24.67%in average.