Logic And Memory Devices Based On Van Der Waals Heterostructures

Two-dimensional?2D?materials have attracted wide interests due to their high-performance electrical,optical,and mechanical properties.Among them,2D semiconductors are promising channel materials on the way to further device miniaturation because the carriers in atomically thin 2D semiconducotrs can be effectively tunned by the gate voltage.On the other hand,due to atomically thin thickness in 2D materials,the charge transport of 2D materials is sensitive to surroundings.With the raipd development of 2D materials,researchers are tried to stacking different 2D-materials layers and constructing a class of new material—van der Waals heterostructures,providing opportunities to observe fantasic phenomena and construct novel functional deivices.The atomically smooth,clean,and sharp interfaces in van der Waals heterostructures provide opportunity for high-performance devices.This ph D thesis foucus on the field-effect trainsistor?FET?,logic inverter,and floating-gate memory based on van der Waals heterostructures with InSe and MoS₂ as channel materials.1. Using an InSe/hBN/graphite heterostructure as the unit of 2D FET,with InSe as channel material,hBN as dielectric,and graphite as gate,we obtained high-performance heterostructured InSe FETs with high electon mobility up to 1,146 cm²?V^-1?s^-1 at room temperature and on/off ratio up to 10¹⁰.Digital inverters constructed by integrating two such FETs with local gate modulation and an ultrahigh voltage gain up to 93.4 is achieved.Furthermore,the heterostructed InSe FETs stacked on a flexible substrate shows little change in performance at high strain level of 2%.Therefore,this heterostructured device based on van der Waals heterostructures is a promising device configuration for future electronics and flexible electronics if wafer-scale,high-quality two-dimensional semiconductors and hBN can be obtained.2. Changing the electrical connection,the InSe/hBN/multilayer graphene on the silicon wafer can be operated as the unit of floating-gate memory device,with InSe,hBN,multilayer graphene,300-nm-thick SiO₂,and p⁺⁺silicon as channel material,tunnel-barrier layer,floating-gate layer,control-gate dielectric,and control gate,respectively.We have achieved nonvolatile,floating-gate momeory devices based on van der Waals heterostructures with atomically sharp interfaces between different functional elements and demonstrated untrhigh-speed operations with write and read times in the range of nanoseconds and extremely high extinction ratio up to 10¹⁰.In addition,we have also achieved such high-performance floating-gate memory with MoS₂ as the channel material.Furthermore,we have achieved multi-bit storage floating-gate memory by optimizing the thickness of hBN.The high-performance floating-gate memory devices based on van der Waals heterostructures with ultrahigh-speed operations,nonvolatility,ultrahigh extinction ratio,multi-bit storage provide a new route for future memory and storage technologies.3. I participated in upgrading a commercial four-probe scanning tunneling microscope system.I optimized the chamber and equipment in order to maintain ultrahigh vacuum environment steadily in the long-term.In addition,I designed the heating equipment to degas samples.Meanwhile,I added the amounts of wires and optimized wire layouts to take advantage of new added small scanners,capable of atomic resolution,and original large scanners,capable of location in the large scale.