Research On Thermal Management Of Three-dimensional Power System

Since the invention of Integrate Circuit(IC),the developing of IC industry nearly follows the Moore's Law.With the shrink of IC's feature size and the further expansion of IC's scale,the physical size of the transistor is closing nearly to the technical limit of the device,which lead to a more infeasible to improve the performance of ICs by simply reducing the size of the feature,Moore's law faces a serious challenge.What's more,the increased manufacturing costs and risks due to constraints of the nature of the material.Today,facing the pursuit of high-capacity,multi-function,high-performance electronic products,a series of problems such as the delay of the interconnection signal and the increasing power density of the chip caused by the t raditional two-dimensional integration technology are becoming more and more prominent,the IC industry has entered the “Post Moore Era”.The three-dimensional integration technology,which is a system-level architecture method,is one of the main strategies for fast developing of IC industry.It uses a stack of devices,chips or modules in the vertical direction to increase the number of devices on the chip while ensuring the same chip area,so that Moore's law can be extended.The three-dimensional integration can also be used to construct high-complexity systems with different materials,different structures and different functional devices.Among them,Through Silicon Via(TSV)technology is the key technology of three-dimensional integration technology,based on it,multiple chips are stacked and interconnected by the high-speed and high-density silicon through holes,and the TSV shorten the interconnect length on-chip effectively.The three-dimensional integration technology can improve the integration of the chip and alleviate the interconnect delay.Therefore,it appears higher running speed and lower power consumption,and it can significantly improve the performance of the integrated system.In the application of the three-dimensional integration technology for power system,the integration will be improved significantly.Meanwhile,compared with the planar power integrated circuit,the power density in a unit area increases significantly.Because of the high thermal resistance of the low thermal conductivity dielectric layer between three-dimensional stacking layers,the heat generated by the three-dimensional power integrated circuit can not be released from the chip in time,and under the double pressures of larger heat generation and more difficult of heat dissipation,the thermal reliability of three-dimensional power integration is more serious.In order to ensure the thermal reliability of the three-dimensional power system,the thermal management of the three-dimensional power integration system requires not only the thermal model to describe the thermal behavior of the system correctly,but also the heat dissipation technology to control the temperature of the system in an operating range.In this paper,a series of research work has been carried out on the needs of thermal management in the three-dimensional power integrated circuit,and the main research is as follows:1,Study on the manufacture Technology and Thermal stress of the heat dissipation TSV.Through the research on the technology of large number of semiconductor manufacturers in China,the process and manufacture of the embedded thermal-TSV(TTSV)are completed,and a set of process and process parameters for the manufacture of the through-hole etching and the through-hole process of the silicon are obtained.Based on the thermal stress models of all kinds of silicon through holes,the heat dissipation silicon through holes are modeled by using COMSOL simulation software.The model is verified by finite element method.According to the criterion of 5% change rate of carrier mobility caused by tsv thermal stress,the safety distance between the TTSV with a depth of 200?m and the diameter from 10?m to 60?m is obtained.2,Study on Heat conduction Model of three-dimensional Power system.According to the structure characteristics and heating mechanism of three-dimensional power integration system,a more precise one-dimensional steady-state thermal resistance model and steady-state thermal design method are proposed.The feasibility of the model and design method is verified by COMSOL simulation software.The process of establishing the one-dimensional steady-state thermal resistance model is as follows: Firstly,the thermal unit of the power device is divided into several power blocks,and the through silicon holes of the heat dissipation are evenly placed around the power block,and a power block and a TTSV are composed of a micro-unit.Then,assuming that the longitudinal heat conduction path is completely blocked,the equivalent thermal resistance model of the micro-element is established.Finally,the local heat path,transverse heat path and TSV insulation sleeve are modified to the thermal resistance model.3,Based on 3D Integration Technology of power VDMOS device design and manufact ure,we proposed a method for evaluating the drain current of three-dimensional MOSFET devices,and we used VDMOS as a test object and it had been simulated by the Silvaco platform,guided by one-dimensional steady-state thermal resistance model,a VDMOS power devices,which operating voltage is 100 V,operating currents is 60 A,ha ve been divided equally on two plane chips,The VDMOS parallel cell on each chip is then divided into multiple power blocks,then a large number of thermal-dissipation Silicon vias had been embedded in the safe region between those power blocks,by this way,the thermal dissipation and the thermal management of three-dimensional power VDMOS been realized.The results of simulation and experime ntal test indicated that the electrical properties of the devices are good.4,Study on manufacturing process technology of three-dimensional power integration.A set of three-dimensional power MOSFET devices is designed,and the key technologies such as TSV fabrication and interlayer stacking bonding are verified by experiments on the chip layer of the power MOSFET devices.The TSV thermal distribution experiment of the sample was carried out by using the infrared thermal imager.The results show that TSV can transfer the heat quickly and effectively,and the distribution of TTSV in the sample is reasonable.