Study On Alkali Barrier CMP Material And Process With Low Abrasive Concentration For GLSI Multylayer Copper Wiring

With the development of semiconductor integrated circuits,the feature size is scaling down,and manufacturing process of the integrated circuits is becoming more and more complex.Chemical mechanical planarization is one of key processes in integrated circuits manufacturing,and it is also the core technology to achieve local and global planarization of multi-layer copper wiring.Barrier layer CMP is the last step of multilayer copper wiring planarization,and the polishing quality directly affects the reliability of devices.In this paper,according to the barrier CMP of 65 nm technology node,in order to gain lower abrasive concentration and mechanical pressure,the theory and techniques were studied under the support of national major special project,and the new breakthrough was obtained.Meanwhile a good foundation was laid for the further develop of the microelectronics technology.The main achievements of this thesis are summarized as follows:1.CMP process parameters were studied in depth by applying mass transfer theory and stagnant layer theory,and optimal polishing parameters of working pressure 1.0psi,back pressure 0psi,rotational speed of polishing head 57 rpm,rotational speed of polishing disk 63 rpm and flow rate of slurry 300ml/min were obtained.Compared with the present industrial technology level,the working pressure was reduced more than 30%,and it meets the requirement of technology further development for the lower mechanical pressure.Under such condition,a better effect of planarization(WIWNU=0.021)and surface roughness(Sq=0.617nm)were achieved.2.Using the alkaline barrier CMP theories and increasing chemical action by adding chelating agent in the slurry,the abrasive concentration was reduced from 20wt% to 10wt%,controllability and adjustability of the rate selectivity ratio((RRTa + RRSi O2)/RRCu=1.5~2.0)was realized under the condition of without adding antioxidant and corrosion inhibitor used by international mainstream product,which laid a good foundation for further decreasing lower abrasive concentration and polishing pressure.3.The optimal matching of the slurry was determined by the new method of combining dynamic electrochemical and chemical mechanical polishing,which was consisted with FA/O surfactant 6vol%,FA/O I chelating agent 7.5vol% and FA/O II chelating agent 0.05vol%.According to such result,the key problem of inhibiting interfacial corrosion was solved.4.12-inch pattern wafer in 65 nm technology node was polished by using the above results.After polishing the wafer leakage current(I=10-12A)was one magnitude lower than that of the commercial slurry(I=10-11A),the depth of dishing pits decreased 200 ? than that of the commercial slurry,the depth of the erosion pits was about 1/2 of the commercial slurry,and the interface corrosion was effectively controlled.Such results will have a certain guiding significance for industry practical application.5.The validation experiment was performed in production line by using FA/O alkalinecleaner for the 12-inch pattern wafer after barrier CMP.According to the results,whenthe FA/O II chelating agent was 0.0075vol% and the FA/O surfactant was 0.15vol%,thedefect number of wafer surface was minimum,and the residual problem of cupric oxideand benzotriazole was solved successfully.The alkalization of cleaner was realized,andit had the advantages of simple composition,easy to control the production process,high cost-performance,without corrosion for equipment and no pollution,which meetsthe requirement of alkalization cleaner for new barrier materials used in 28nm~14nmintegrated circuit.