Research On Endurance For Phase Change Memory Based On Data Value Locality

The current computing system has to employ memory hierachy,which combines several kinds of storage devices together,to fullfill the requirement of speed,thoughput,capacity,and non-volatility.However,this design brings more complexity to the hardware/software design and more power consumption.While the emerging phase change memory(PCM)technique,which is treated as a candidate for future memory system,is hoped to change the current situation because it has almost every property that a perfect storage device should have.However,PCM is suffered from the limited endurance problem.Therefore,the major purpose of the present work is trying to provide solutions for this problem.Specifically,the endurance of PCM is not only sensitive to the repeat pattern of writing address,but also to the pattern of writing content.So,the present work is started at the research on the pattern of content at first,which followed by two studies on reducing number of flipped bits per write and a research on how to balance write amount difference among storage locations.The achievements and contributions of the present work are as follows:· The present work discusses the data value locality in detail and points out that the locality is consisted of two behaviours: the macro behaviour and the micro behaviour.Based on experiments,the selected applications are run on X86-32,X86-64 and arm-32 environments.The information of their memory trace is collected.The data value,the change rate of byte location,the chained change rate of the byte location,and the value distribution on different byte localiton are analyzed quantitatively,as the basis of the following work.· The present work proposes a fast and efficient differential write reduction method,named FEBRE,serving for the applications with near-uniformly distributed writing data that is a sign of weak data value locality.The key points of the method include a pipelined pseudo-random encoding algorithm,an star-generating rule and a general encoding direction pattern to accelerate read/write operations and eliminate redundant elements in the encoded candidate set which could reduce more bit flipping.The experiment proves that FEBRE has the best write reduction capability among all known similar methods,and meanwhile,it keeps low read/write delay as well as the implementation overhead.· The present work furtherly discusses the theoretical limitation of the differential write method and the way to reach the limitation.By establishing a math model,the numeric values of the limitation,which means the minimum number of flipped bits per write,are calculated.Then,a novel differential write reduction method,named R2D2 is proposed,as well as its simplified implementation R2D2-L.The former,based on linear congruential pseudo-random function,is very close to the theoretical limitation of wrtie reduction.While the latter,R2D2-L,which is close to R2D2 on the write reduction capability,has a very low implementation overhead.· The present work proposes an endurance enhancement method,named RMB,which is trying to serve applications with strong data value locality.An interesting feature of the method is that the write reduction effect and wear leveling capability are both achieved.Specifically,Through redirecting the writing amount from the current heavy-wearing storage chip to the auxiliary long-life chip,RMB method achieves the both effects and meanwhile successfully avoids the disadvantage of wear leveling method,which is not friendly to the light wearing storage locations.The experiment shows that RMB method is able to perform better even than the perfect leveling method under some cases,which is the theoretical limitation of all wear leveling methods.