The Investigation Of High Permittivity Material Applications On Silicon Power Devices And The Realization Of Novel Power Devices With High Permittivity Material

Power devices are the essential parts in the electrical energy conversion, whoseperformance is sensitive to the efficiency of energy conversion. Although the functionsof portable devices are increasingly powerful, it is severely bottlenecked by thereduction of usage time. However, it is extremely difficult to achieve breakthrough inbattery technology, boosting the energy conversion efficiency is the only feasiblemethod to prolong the usage time of the portable devices. Although people havedevoted excessive efforts to optimize the device structure and enhance the deviceperformance, the performance improvements are always limited because of the materialbehavior. With the help of high permittivity material, the nano CMOS device breaks thebottleneck of gate leakage current and successfully promotes the Moore’s law below90nm. However, rarely have any literatures paid attention to the application of high-Kmaterial on power devices and investigate its behaviors.Supported by the major state basic research development （973） program of China（Grant no.50772019） and state key laboratory of electronic thin films and integrateddevices opening program（grant no. CXJJ201101）. The author engaged in acomprehensive investigation towards the interaction between high-k material andsilicon; analysis the mechanism of electrical field interaction; study the high-k materialfor the requirements from power application; developed the high-k&BCD compatibleprocess; successfully fabricated an LDMOS with high-k dielectric and experimentallyverified the improvement of the lateral power device from effect of the high-K. Basedon the above, the high-K material is transfer to vertical power devices and super high-Kpower devices are proposed, whose mechanism is also analyzed in detailed and verifiedby simulation.The major contributions and innovations in this thesis are listed below:1. The first LDMOS device with lead zirconate titanate dielectric is realized. Withthe effect from high-K, the LDMOS achieved triple breakdown voltage compared withconventional LDMOS with SiO₂dielectric. The device has been applied for a Chineseinvention patent and already authorized （Patent No.201110007009.1）. The research project aimed at this device has been funded by state key laboratory of electronic thinfilms and integrated devices opening program in September,2011（grant no.CXJJ201101）.2. An error conclusion about the peak electric field at the edge of the field plate hasbeen overturned in the thesis. Convention theory believes that the breakdown voltage atthe edge of field plate is equivalent to a planar PN junction with the depth of (ε_si/ε_die)tdie,where ε_si, ε_die, and tdieare the permittivity of silicon, permittivity of dielectric, andthickness of dielectric, respectively. According to the conclusion above, with fixed ε_siand ε_die, higher ε_diebrings larger junction depth and higher breakdown voltage. However,both theoretically and experimentally, this thesis demonstrated the breakdown voltage atthe edge of the gate will be boosted with the increase of ε_die, instead of decrease. Thisnew finding has been published on IEEE Electron Device Letters in2011.3. A novel mechanism for potential distribution at high-K field plate is proposed.Although conventional field with SiO₂dielectric is also capable of suppressing peakfield at the PN junction in LDMOS, another peak field at edge of the gate will beintroduced at the cost, which limits the breakdown voltage improvement. Whereas thefield plate with high-K dielectric allows the suppression of PN junction peak field at nocost of introducing additional peak field at the edge of the field plate. As the result, nopeak fields exist at the LDMOS drift region and the device breakdown voltage isthereby significantly boosted. The author has reported the mechanism in IEEE ElectronDevice Letters.4. The high-K fabrication process which is compatible with BCD is developed,based on which, an LDMOS with PZT dielectric is fabricated successfully. As existingHfO₂process, which is only available in the foundry of Intel or IBM, is incompatiblewith conventional BCD process, the author proposed a high-K LDMOS fabricationprocess that compatible with standard foundary. The initial steps are fulfilled in thefoundary, and the remaining steps are accomplished in the micromachining centre inUESTC. A functional LDMOS device with high-K dielectric is fabricated successfully，about which the test reports by CETC-24and CETC-47as well as an assessment reportby CETC-24are obtained.5. The ultra accumulation effect in silicon power devices brought high-K materialis found. With the high density carrier generated by accumulation effect, the specify on-resistance of the power is no longer rely on drift region doping concentration, thespecify on-resistance is therefore significantly reduced. The research project target atthe high-K accumulation effect has been granted by the national natural sciencefoundation of China（Grant No.61204084）.6. A novel silicon vertical MOS device which allows the full play of high-Kmaterial is proposed. The potential distribution is optimized by high-K trencharchitecture; the P silicon is filled inside the high-K pillar and contact with gate, whichallows the strong accumulation effect happens at the entire drift region. The simulationresult indicates that the specify on-resistance of the device is three orders lower thanthat of the Super Junction under the same breakdown voltage circumstance. The devicedemonstrates the great potentiality of high-K for its application on power device, whichprobably open up a new era for the development of power device. The device has beenapplied for Chinese invention patent.（Application No.201210243181.1）.7. Aim at the driving problem for high-K power device, a charge pump CMOSdriver suitable for high-K application is proposed. Utilizing the large capacitor toaccumulate the charges, higher or negative driving voltage is generated to charge ordischarge the load capacitor. As the larger capacitor and voltage source willsimultaneously output or absorb the current, the driving capability is significantlyenhanced. With the usage of high-K material, large capacitor is realizable with smallarea. The circuit has been experimentally verified and the result has been report in theMicroelectronics in2011.