Study On The Heterogeneous Reconfigurable System On Chip Targeting At The Big Data Applications

The development of the internet technology is merging the global data. Applica-tions, such as the website search, electronic commerce, internet of things, video and image sharing, as well as medical applications, can generate huge amount of data every day. The world benefits a lot from the big data applications, leading it as one of the most important fields in modern time. However, big data applications are challenged by extremely large amount of data, usually in terabytes(TB) or petabytes(PB), even ex-abytes(EB). Huge data parallelism exists in the big data applications, which could not be fully employed by current computer systems. Besides, the operations in the big data applications are in limited of types, causing certain execution units in the general pur-pose processors being heavily used, while leaving others idle. Therefore, traditional high performance general purpose processor platforms are not very suitable to the big data applications. With respect of the situation, we propose a novel FPGA-based het-erogeneous multi-core system, targeting at accelerating the big data applications. The main contents of the dissertation consist of the following aspects:1. Hardware design of the heterogeneous multi-core reconfigurable platforms tar-geting at big data applications We propose a novel heterogeneous multi-core reconfigurable platform in this dis-sertation, which consists of a personal computer and a FPGA board. The platform could achieve great advantages, by employing both the high performance general purpose processor in the personal computer system and the reconfigurable accel-erators in the FPGA device. Interconnection bus is used for the data exchange between the personal computer and the FPGA device. Such a loosely coupled architecture would largely increase the flexibility and scalability. In addition, a virtual memory unit is integrated in the FPGA device to manage the off-chip mem-ory, providing storage support to the big data applications. Besides, an embedded processor, a data exchange controller, an accelerator configuration unit as well a debug module are integrated on the FPGA device, providing necessary hardware support to the on-chip system development.2. Study on the programming model for the big data computing platform Current heterogeneous multi-core reconfigurable platforms are facing problems, such as difficulties in development, lack of flexibility and portability. With respect of the critical situation, we propose a big data application oriented heterogeneous platform programming model, which could provide an easy and high performance design flow to the hybrid system. A distributed operating system framework is used on the platform. Traditional mainstream operating system is arranged on the personal computer and an embedded operating system is employed on the system-on-chip. On-chip resources, such as the data exchange interface, virtual memory system, reconfiguration unit and hardware task create and scheduler is managed by the embedded operating system. Besides, various kinds of services are available in the embedded operating system for the designers to apply resources in the FPGA-based platform.3. Designs of typical big data applications on the hybrid system In order to verify and explain the advantages of the platform, we choose several applications, such as genome alignment in the bio-informactics, the data cluster-ing and recommendation algorithms in data mining field, and the deep learning in the artificial intelligence field. These applications are deployed on the pro-posed hybrid platform. Experimental results are analyzed to show the benefit and performance of the platform.