Research Of SRAM Single Event Effects Based On Pulsed Laser Testing

Pulsed laser has been used widely in experimental studying and engineering practices of single event effects by a number of groups throughout the world. The increased use of pulsed laser for SEE studies can be attributed to providing the detailed spatial and temporal information with low cost, simple operation and high efficiency. It has been proved as an effective tool to investigate various aspects of SEEs and test validity of mitigation techniques in devices and ICs.However,with the downscaling of CMOS technology, advanced semiconductor devices are more and more sensitive and exhibit new phenomena and problems in SEE responses, which bring new challenges for pulsed laser testing of SEE. In this work, physical mechanisms and experiment techniques of laser testing SRAMs are investigated using pulsed laser facility of National Space Science Center. Based on these investigations, laser SEE sensitivity mapping, in-flight rate prediction and latchup mitigation techniques are also studied, which are valuable for ground-based experimental testing of SEE.The main researches and conclusions of this work are as following:1)Physical mechanisms and correlation to heavy ion hit of pulsed laser SEE testing are investigated. Based on comparative analysis on similarities and differences between pulse laser and heavy ion interacting with Si material, the comprehensive coefficients in the calculations of equivalent LET are investigated. The mistake in the energy transportation of laser frontside incidence in the previous studies has been corrected and the model of energy transportation of laser backside incidence has been improved during the studying of laser quantitative computation. A systematic quantitative evaluation method in terms of laser equivalent LET is developed, which is validated by both pulsed laser and heavy ion SEL testing of some typical devices and ICs.2)Laser SEE sensitivity mapping technique and backside preprocesses of device in ceramic package have been developed. Pulsed laser facility for SEU sensitivity mapping is utilized to study SEU sensitive regions of 0.18mm CMOS SRAM cells. TCAD simulation is performed to examine SEU sensitivity characters of the SRAM cell. Laser mapping results are well consistent with the electron micrograph information and TCAD simulation results, which present that the laser test technique is reliable and of high mapping precision for deep submicron technology device. What is more, backside preprocesses of devices in ceramic package has been developed using high power laser, which can meet the requirements of pulsed laser backside incidence to trigger SEE.3) SEU and SEL sensitivity mappings of SRAMs are performed respectively. SEU sensitivity mapping results of SRAM IDT71256 S with 4T2 R memory structure present that some cells are sensitive to upset when the cell state is 0, while other cells are sensitive when the cell state is 1. Moreover, the locations of the two memory cells are alternative. The peculiar phenomenon is not related with the frontside metal layers of the device. Both the laser experiment and heavy ion testing present that SEU sensitivities of the SRAM cells depend on the pattern of data stored in the memory cells. SEL sensitivity mappings of SRAM show that the sensitive regions have similar repetitive patterns. The incidence orientation of heavy ion could affect the SEL test result when the heavy ion strike at the device with inclined angle, which is called as ―lateral angle effect‖.4) It is proposed and investigated that in-flight SEL rate prediction is corrected using pulsed laser sensitivity mapping test. The number of SEL sensitive volume(SV) in the device is determined using laser SEL sensitivity mapping. The contribution of proton direct ionization to latchup rate is considered. The researches present that pulsed laser is a powerful tool to locate sensitive regions in ICs and so it could be the best way to measure the sensitive volume number for latchup rate prediction. It is of significance to obtain the real SV number for SEL rate prediction generally. Both the heavy ion and trapped protons SEL rates decrease with SV number, which has a greater impact on rates for the device with higher latchup threshold LET value or thicker SV. Moreover, the SV shape could also have influence on latchup rate. Compared to the traditional assumption of SV with same length and width, the practice of SV with large aspect ratio leads to a lower predicted latchup rate.5) SEL mitigation techniques at circuit level are investigated using pulsed laser. Current-limiting resistant, constant current resource and power cycling, which are commonly used in SEL mitigation, are studied experimentally based on the latchup characteristics of the SRAM. Laser experiment results present that current-limiting resistant can reduce amplitude of latchup current effectively, but the circuit cannot quit the state of high current. The constant current source current-limiting circuit not only reduces the amplitude of latchup current, but also eliminates the latchup state. SEL state could not be eliminated by power cycling of VCC pin of the device only; Cutting off all the connections of the device with other circuits is the effective method for latchup mitigation.