Research And Design Of Integrated Low Noise Power Management For CMOS Radio Frequency Tuner Chip

Recently,benefit from the development and maturity of Radio Frequency(RF) integrated circuit technology,RF communication products keep growing quickly with the tendency of lowing costs,enriching functions and perfecting performances.There are great challenges for RF ICs,the core parts of the RF communication products, arising from the fierce market competition,complicated applications and the developing communication technology.Higher level integration has become the must solution of the RF ICs to achieve lower costs and better performances.Consequently, the integration of power management function into RF ICs is definitely and inevitably an important direction of the development of RF ICs.In this thesis,the research and design of the integrated low noise power management for RF tuner chips,based on RF CMOS process,has been introduced. The efforts include:Firstly,considering of the requirements in practical applications of the RF ICs,the object and the strategy of the integrated low noise power management are presented, which include providing programmable digitalized control,on-chip power supply, power supply noise and spurs suppression and low noise reference voltage.Secondly,power supply noise analysis is given,which includes the impact of the power supply noise to each circuit block in the RF tuner chip and the contribution of each circuit block to power supply noise.Based on this analysis,a power domain partition,targets on suppressing the on-chip supply noise,is introduced.In this power domain partition,all circuit blocks are placed into different power domains according to their power supply noise characteristics.And the power domains are isolated from each other to alleviate the supply noise coupling.Thirdly,combined with the advantage of bandgap reference and the threshold voltage(V_TH) bias circuit,an ultra low noise voltage reference with digital calibration is proposed.This voltage reference circuit can achieve ultra low out noise and high voltage accuracy at the same time.In addition,a digitalize distribution network for reference voltage delivery is presented,which can eliminate the noise injection problem coursed by traditional voltage mode and current mode distribution network.Whereafter,three kinds of low drop linear regulators(LDO) are proposed in this thesis.They are low noise LDO,high reverse isolation LDO and LDO used to power up digital circuit.All on-chip power supplies of circuit blocks are provided by these LDOs. At last,a programmable and digitalized power management unit control scheme is presented,which includes I²C series bus interface,register file and digitalized voltage and current control.The proposed structure and circuits of integrated low noise power management for RF tuner chip have implemented and verified by using TSMC 0.18um RF CMOS technology and been applied to a satellite digital video broadcast(DVB-S) tuner chip.