Research On SPICE Macro-Modeling Of High-Voltage DMOS For PDP Scan Driver IC

In recently years, the power integrated circuits (PIC) were applied in many regions with the rapidly developing of microelectronics. The high-voltage integrated circuit has played a central role in the fields such as Plasma Display Panel (PDP) driver IC, Liquid Crystal Display (LCD) driver IC and autocontrols IC. The circuit simulations could reduce the cost and abridge exploitation cycle in design of PDP driver IC. Whether the results of simulations could predict the PIC's performance exactly, the precise HV device model was important and wanted. At present, the amount of HV models is limited for PIC Computer Aided Design (CAD). The HV devices and circuits used in PDP driver IC are lack of support of foundry because them are all custom-built and owner property. It is necessary and urgent to establish the SPICE modeling for PIC CAD.This dissertation presents a methodology for SPICE macro-modeling of high-voltage DMOS devices for PDP scan driver IC design. Based on the physical modeling derived from initial mechanism, a new SPICE macro-modeling for the vertical double-diffused MOS transistor (VDMOS) and the double-diffued MOS transistor (LDMOS) have been developed. Because of conventional SPICE modeling of HV device badly reling on the topology of equivalent circuit, the precision of simulations couldn't satisfy the request of PIC CAD for the standard element of equivalent circuit varing much from the HV device. In this paper, the author gives the composite modeling which comprising the physical modeling, mathematic nodling and macro-modeling.At first, the physical modeling was derived from basic semiconductor equations. The unique features of DMOS such as quasi-saturation, non-uniformly doped channel, and temperature dependencies are accurately modeled. It also includes accurate, transient models for the parasitical non-linear capacitances, which can satisfy the conditions of high-voltage and big signal. Based on the static and transient physical model, the I-V and C-V characteristics have been described by the terminal of HV devices. Secondly, the canonical piecewise-linear modeling was employed to construct the two dimensional mathematic modeling of HV DMOS for the first time based on the physical modeling. According to the ideology of canonical piecewise-linear modeling technique, the optimization coefficients were found using the Powell's algorithm by the help of MATLAB. Above process has transformed the physical modeling into mathematic polynomial without losing the accuracy of electric behavior of initial physical essence. Thirdly, the new equivalent circuits of DMOS were put forward according to their special structure. It is easy to solve the compatibility between the equivalent circuit and SPICE simulator because the mathematic model of I-V and C-V can be directly implemented in SPICE. SPICE macro-modeling were established by combing above mathematic model and standard element built-in SPICE.At last, the macro-modeling were used to predict the performance of PDP scan driver IC. The veracity of the suggested models is verified by the experimental measurements and the MEDICI (DC error within 10%, and transient error within 15%, over the voltage range 0-100V). The experimental result of PDP testing has shown that the scan driver IC work well, the driver IC entirety satisfied the request of function for PDP system.