Study Of Novel Structural SOI Materials And Device Physics

Silicon-on-insulator (SOI) technology is expected to replace bulk silicon technology in nano-scale electronics because it possesses many advantages over later one. However, wider application of SOI to high temperature and high voltage integrated circuits is hampered by the self-heating effects caused by the poor thermal conductivity of the buried silicon dioxide layer. Hence, it is important to explore alternative buried insulators with better thermal conductivity.Under above backgrounds, the works in this thesis focus on fabrication of novel structural SOI materials with AIN, diamond-like carbon (DLC), and SiO_xN_y as buried layers; numerical simulation of self-heating effect and floating-body effect in SOI devices; and fabrication of an SOI CMOS circuit for electric-pulse time-interval measurement with radiation hardness. The main results are summarized as follows:Innovatively using ultra-high vacuum electron-beam evaporation with ammonia and plasma immersion ion implantation (PHI), AIN thin films with low O concentration, outstanding surface morphology and high electrical resistivity have been successfully fabricated on silicon. Using a modified Si/AIN direct bonding process in conjunction with hydrogen-induced layer transfer, a large area silicon-on-AIN (SOAN) structure has been successfully fabricated. The analytical results reveal a uniform buried AIN layer beneath a single crystal Si overlayer. The interfaces between the top Si layer, buried AIN layer, and Si substrate are smooth and sharp. The successful fabrication of SOAN substrate makes it possible to expand the applications of SOI technology to high temperature and high voltage integrated circuits.For the first time, we have successfully fabricated the silicon-on-diamond (SOD) structure with DLC as buried layer. The DLC films synthesized on silicon by a special plasma immersion ion implantation & deposition (PIII&D) process exhibit outstanding surface topography and maintain excellent insulating characteristics up to an annealing temperature of 900°C. Using Si/DLC direct bonding and the hydrogen-induced layer transfer method, SOD structure has been successfully formed. XTEM results reveal that the bonded interface is abrupt and the top Si layer exhibits nearly perfect single crystalline quality.Innovatively using low cost and high efficient nitrogen and oxygen plasma immersion ion co-implantation as well as Si/SiOxNy direct bonding process, a silicon-on-SiOxNy structure has been successfully fabricated. The analytical results indicate that excellent insulating characteristic of SiOxNy buried layer is maintained up to an annealing temperature of 1100°C, which can be attributed to the presence of O. Moreover, the bonded interface is abrupt and the top Si layer exhibits nearly perfect single crystalline quality.A MOSFET fabricated on SOAN substrate is compared to those in bulk and SOI substrate using MEDICI simulation to determine the electrical characteristics and temperature distribution. Our results show that the channel temperature and negative differential resistance (NDR) in the SOAN devices are reduced suggesting that SOAN can mitigate the self-heating penalty effectively, which indicates that AIN is indeed a suitable alterative to S1O2 as the buried dielectric in SOI.Two novel device structures, i.e. body contact with an underlying p+ region and SiGe source, are proposed to suppress the floating-body effect in SOI devices. The output characteristics, transfer characteristics, hole current vectors and so on are numerically simulated using MEDICI. The results indicate the feasibility of suppressing floating-body effects using these two device structures. And the detailed suppression mechanisms are also studied.Using 1.2um SOI CMOS design rules, a circuit for electric-pulse time-interval measurement is designed. Its operational principle is dealt with and the layout design of enhancing the radiation hardness is described. Test results of the fabricated chip show that this SOI circuit has a good performance with respect to measurement accuracy, measuring speed and radiation hardness compared to bulk silicon circuit.