High-speed Serial Data Transmitter

The requirement for large-volume and high-speed communication is increasing day by day. The serial link has been more and more used in modern communication system. And it will be dominant methodology of next generation data communication. On the basis of recent research, this thesis concentrates on bellowed several aspects to do some research of high-speed transmitter.Firstly, it is system research. There are several topics have been mentioned in this thesis. Firstly, signal conversion as an important aspect in data communication has been discussed here. It includes comparisons of differential and single-ended, binary and multilevel. Secondly, signal channel analysis concentrates on the dominant channel materials of data communication, which are PCB and coaxial cable. In this thesis, the channel model and pre-emphasis theory has been built up. Thirdly, as the main performance of transmitter, the maximum data rate and Bit Error Rate (BER) have been analyzed. Base on above several topics, the thesis categorizes transmitter system in signal conversion, system clock method, signaling method.The thesis also describes two designs of high-speed transmitters. The first design is a 1.5Gbps full speed clock transmitter in the application of Serial ATA. It concludes high speed clock generator, improved parallel-to-serial circuit, combined linedriver. The second design is a 1.25Gbps transmitter in the application of Ethernet. It adopts half-rate-clock architecture and improve tree type parallel-to-serial circuit and optimization system power consumption. The third design is a 3.125Gbps multi-clock-phase transmitter in the application of Ethernet. It adopts multi-phase clock generator, a duty-cycle stable circuit to minimize deterministic jitter and pre-emphasis linedriver to compensate attenuation of channel.At the end of thesis, a summary is put forward are mentioned.