Research On Optimization Design Theory Of Test Scheme And Key Technologies For Electronic System

Electronic system is an important part of civil industry, aviation industry and defense industry. With the sharp increasing integration and complexity of modern electronic systems, to test and diagnose these systems becomes increasingly difficult and hence the design for testability(DFT) of electronic systems is urgently needed. The optimization design of test scheme considers the problems of test location, test content and test approach. It proposes an overall planning about where to test, what to test and how to test according to the test and diagnostic requirements of electronic systems. The optimization design of test scheme, as an important part in DFT, is crucial for improving test efficiency and diagnostic accuracy, and reducing test cost, and promoting the technology of current DFT technique. In view of the important role of electronic systems and the lack of efficient and accurate methods to optimize test scheme in domain of DFT, this dissertation takes electronic system as the study subject and deals with three key technologies including: test point selection for analog circuits, test selection for complex electronic systems and optimization of demonatration scheme for testability indexs. The main contents and contributions of this dissertation are as follows:1. Research on test point selection method for analog circuits based on fault dictionary approach. First, the existing methods for test point selection are systematically summarized, and are classified into intelligent optimization algorithm and greedy algorithm. Then, this dissertation proposes the following three methods for test point selection.(1) To overcome the problem that the existing intelligent optimization methods for test point selection have poor performance in terms of search efficiency and solution accuracy, a new method based on quantum-inspired evolutionary algorithm is proposed. The proposed method uses the near-optimal test point set produced by inclusive algorithm to initialize Q-bit individuals, and designs a monotonous fitness function and a strategy for dynamically adjusting the magnitude of rotation angle according to the characteristics of test point selection. These measures are used to guarantee fast convergence and global optimality of the proposed method. Experiment results show that the proposed method, compared with other intelligent optimization methods, can find the optimal test point set faster.(2) To overcome the problem that the existing greedy methods for test point selection are hard to search the optimal test point set, a new method based on greedy randomized adaptive search procedure is proposed. The proposed method corresponds to a random heuristic iterative process, with each iteration consisting of a construction phase and a local search phase. The former uses inclusive algorithm to produce a feasible test point set, while the latter employs exclusive algorithm to remove redundant test points from the set. Besides, random strategies are introduced to both phases to overcome the myobic and deterministic of greedy methods including: randomizing the selection of evaluation criteria and checking redundant test points in a random order. Experiment results show that, compared with other methods, the proposed method searches the optimal test point set more efficiently and accurately. It is particularly fit for the circuits which have multiple optimal test point sets.(3) The above methods for test point selection are only applicable to the case where the fault signatures stored in the dictionary are voltages. Moreover, these methods are carried out with the objective of finding a minimum set of test points, but neglecting its performance of fault diagnosis. To address these problems, a new method based on hierarchical clustering and multi-frequency analysis is proposed. It utilizes hierarchical clustering to partition ambiguity sets, and divides the process of test point selection into two stages. The first stage selects an optimal set of test frequencies for each test nodes by using an improved entropy index optimization algorithm, while the second stage combines the results of all nodes to determine an optimal set of test points for the circuit under test by reusing above algorithm. Experiment results show that the proposed method searches an optimal set of test points that not only includes a minimum number of test points but also has higher fault diagnostic accuracy and fault isolation rate. Additionally, the proposed method can also be used to solve the problem of test point selection for some newly proposed fault model.2. Research on test selection method for complex electronic systems based on multi-signal flow graph model. First, an introduction about the fundamental theories and modeling processes of multi-signal folw graph is carried out. Then, the problem of test selection is studied under two scenarios.(1) In the situation of reliable tests. First, based on fault-test dependency matrix, an optimization model for test selection is established with the objective of minimizing the total costs of tests. To optimize the model, an improved quantum-inspired evolutionary algorithm(IQEA) is proposed. Experiment results show that the proposed algorithm has a good performance in terms of solution accuracy and speed of convergence.(2) In the situation of unreliable tests. First, an analysis of the mechanism of how tests produce miss detection and false alarm is made. Then, an optimization model for test selection is established with a single objective that takes both test cost and reliability of fault detection into account. Finally, IQEA is used to optimize the model; meanwhile, some improvements are made to IQEA. Experiment results show that the improved algorithm has better performance than original algorithm and the model achieves a good balance between test cost and reliability of fault detection.3. Reserach on optimization of demonstration scheme for testability indexs.The classic demonstration scheme for testability indexs needs a large number of fault samples and thus is hard to implement in engineering. To address this problem, taking fault detection rate(FDR) as a target, a Bayesian method for determining the demonstration scheme of FDR is proposed. The proposed method first establishes a FDR growth model based on the experimental data acquired in the development stages and then employs expertise to decide the prior distribution of FDR. Finally, a new demonstration scheme for FDR is defined according to the Bayesian maximum posterior risk. Experiment results show that, compared with the classical counterpart, the Bayesian scheme has an obvious effect on reducing the fault sample size.