Research On Reliability Of Stochastic Random Memory Based On Copper Interconnection And Aluminum Interconnection Standard Logic Process

Today when manufacturing critical size is scaled down to20nm in semiconductor industry, the ubiquitous nonvolatile memory-FLASH applied in many electronic systems will approach physical limit, which gives rise to novel nonvolatile memory technologies. To replace FLASH memory, these novel memories should characterize CMOS-compatible process, excellent scaling potential, low cell cost, fast read/write speed, etc. Additionally, improving systematical memory performance by these novel memory technologies, such as to replace HDD (Hard-disk driver), is also a developing direction, which could change overall storage hierarchy in computer system.Resistive ramdom access memory (RRAM) is looked as a potential replacement of FLASH due to its simple device structure, scaling down to beyond16nm, ns-level read/write speed, and CMOS-compatible process. This kind of memory realizes the "0" and "1" storage by high-and low-resistance switching behaviors in materials under electrical stress. Many materials are found to characterize resistive switching ability, including transition metal oxides, chalcogenide alloys, polymers, and organic films. When excellent electrical performances are frequently verified in recent years, some switching-related reliability problems are becoming the focus of resistive memory research.These reliability problems include electrical parameter uniformity, switching layer thickness and composition, reliable read and write, repeatable erase/write, and data retention. Today, resistive switching mechanism is still not clear and it is also difficult to probe local characterization by physical methods, which provides the obstacle of reliability study. However, forward reliability study will not only benefit to optimize the film composition and electrical operation, but also indirectly investigate the reliability related resistive switching mechanism.In this article, based on1Mb RRAM test chip fabricated by SMIC0.13um standard logic process, we study silicon doping effect on resistive switching, electrical operation effect on resistive switching, CuxSiyO RRAM scaling ability, and data retention. By these studies, we optimize the CuxSiyO material composition, investigate electrical operation stability, and verify long data retention and scaling ability down to40nm size. In the last chapter of the article, we preliminarily study the resistive performance and reliability in dual WOx/AlOx layer self-formed by annealing, considering the low-cost Al connection process in the future applications.